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Date:   Mon, 20 Jan 2020 11:15:24 +0000
To:     Andy Lutomirski <luto@amacapital.net>
From:   Krzysztof Piecuch <piecuch@protonmail.com>
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Reply-To: Krzysztof Piecuch <piecuch@protonmail.com>
Subject: Re: [PATCH] x86/tsc: Add tsc_tuned_baseclk flag disabling CPUID.16h use for tsc calibration
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On Friday, January 17, 2020 4:37 PM, Andy Lutomirski <luto@amacapital.net> =
wrote:
> Wouldn=E2=80=99t it be better to have an option tsc_max_refinement=3D to =
increase the 1%?

All that is in the commends about it say that:

 * If there are any calibration anomalies (too many SMIs, etc),
 * or the refined calibration is off by 1% of the fast early
 * calibration, we throw out the new calibration and use the
 * early calibration.

I still don't fully understand why the "1% rule" exists.

Ideally it would be better to get the early calibration right than risk get=
ting
it wrong because of an "anomaly".
OTOH if you system doesn't support any of the early calibration methods oth=
er
than CPUID.16h (mine doesn't support either PIT or MSR) "tsc_max_refinement=
"
would allow you to control max tsc_hz error.

If you think that would be better please let me know.