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From:   "Shivamurthy Shastri (sshivamurthy)" <sshivamurthy@micron.com>
To:     'Miquel Raynal' <miquel.raynal@bootlin.com>
CC:     Richard Weinberger <richard@nod.at>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        Boris Brezillon <bbrezillon@kernel.org>,
        Frieder Schrempf <frieder.schrempf@kontron.de>,
        "linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "shiva.linuxworks@gmail.com" <shiva.linuxworks@gmail.com>
Subject: RE: [EXT] Re: [PATCH 4/4] mtd: spinand: Add new Micron SPI NAND
 devices with multiple dies
Thread-Topic: [EXT] Re: [PATCH 4/4] mtd: spinand: Add new Micron SPI NAND
 devices with multiple dies
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Date:   Tue, 21 Jan 2020 12:23:36 +0000
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Hi Miquel,

>=20
> Hi Shiva,
>=20
> shiva.linuxworks@gmail.com wrote on Sun, 19 Jan 2020 15:54:32 +0100:
>=20
> > From: Shivamurthy Shastri <sshivamurthy@micron.com>
> >
> > Add device table for new Micron SPI NAND devices, which have multiple
> > dies. While at it, add support to select the die.
>=20
> Same comment as in 3/4.

I will correct the comment.

>=20
> >
> > Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
> > ---
> >  drivers/mtd/nand/spi/micron.c | 50
> +++++++++++++++++++++++++++++++++++
> >  1 file changed, 50 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/spi/micron.c
> b/drivers/mtd/nand/spi/micron.c
> > index 45fc37c58f8a..03b486843210 100644
> > --- a/drivers/mtd/nand/spi/micron.c
> > +++ b/drivers/mtd/nand/spi/micron.c
> > @@ -18,6 +18,8 @@
> >  #define MICRON_STATUS_ECC_4TO6_BITFLIPS	(3 << 4)
> >  #define MICRON_STATUS_ECC_7TO8_BITFLIPS	(5 << 4)
> >
> > +#define MICRON_DIE_SELECTION_BIT	6
> > +
> >  static SPINAND_OP_VARIANTS(read_cache_variants,
> >  		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2,
> NULL, 0),
> >  		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
> > @@ -64,6 +66,21 @@ static const struct mtd_ooblayout_ops
> micron_8_ooblayout =3D {
> >  	.free =3D micron_8_ooblayout_free,
> >  };
> >
> > +static int micron_select_target(struct spinand_device *spinand,
> > +				unsigned int target)
> > +{
> > +	struct spi_mem_op op =3D SPINAND_SET_FEATURE_OP(0xd0,
> > +						      spinand->scratchbuf);
> > +
> > +	/*
> > +	 * As per datasheet, die selection is done by the 6th bit of Die
> > +	 * Select Register (Address 0xD0).
> > +	 */
>=20
> I would put this comment close to the macro definition.

Sure, I will do it.

>=20
> > +	*spinand->scratchbuf =3D target << MICRON_DIE_SELECTION_BIT;
>=20
> Either target is or or 1 and you can use the BIT macro, or you suppose
> it can go higher and the _BIT suffix does not fit. _SHIFT would work
> and creating a macro directly would be even better.
>=20

I will create macro directly and send the code in next version.

> > +
> > +	return spi_mem_exec_op(spinand->spimem, &op);
> > +}
> > +
>=20
> Where is this function used?

IIUC your question, the function is used below in device table.
The line is something like,=20

SPINAND_SELECT_TARGET(micron_select_target))

for all the devices with multiple dies.

>=20
> >  static int micron_8_ecc_get_status(struct spinand_device *spinand,
> >  				   u8 status)
> >  {
> > @@ -131,6 +148,17 @@ static const struct spinand_info
> micron_spinand_table[] =3D {
> >  		     0,
> >  		     SPINAND_ECCINFO(&micron_8_ooblayout,
> >  				     micron_8_ecc_get_status)),
> > +	/* M79A 4Gb 3.3V */
> > +	SPINAND_INFO("MT29F4G01ADAGD", 0x36,
> > +		     NAND_MEMORG(1, 2048, 128, 64, 2048, 80, 2, 1, 2),
> > +		     NAND_ECCREQ(8, 512),
> > +		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > +					      &write_cache_variants,
> > +					      &update_cache_variants),
> > +		     0,
> > +		     SPINAND_ECCINFO(&micron_8_ooblayout,
> > +				     micron_8_ecc_get_status),
> > +		     SPINAND_SELECT_TARGET(micron_select_target)),
> >  	/* M70A 4Gb 3.3V */
> >  	SPINAND_INFO("MT29F4G01ABAFD", 0x34,
> >  		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
> > @@ -151,6 +179,28 @@ static const struct spinand_info
> micron_spinand_table[] =3D {
> >  		     0,
> >  		     SPINAND_ECCINFO(&micron_8_ooblayout,
> >  				     micron_8_ecc_get_status)),
> > +	/* M70A 8Gb 3.3V */
> > +	SPINAND_INFO("MT29F8G01ADAFD", 0x46,
> > +		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> > +		     NAND_ECCREQ(8, 512),
> > +		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > +					      &write_cache_variants,
> > +					      &update_cache_variants),
> > +		     0,
> > +		     SPINAND_ECCINFO(&micron_8_ooblayout,
> > +				     micron_8_ecc_get_status),
> > +		     SPINAND_SELECT_TARGET(micron_select_target)),
> > +	/* M70A 8Gb 1.8V */
> > +	SPINAND_INFO("MT29F8G01ADBFD", 0x47,
> > +		     NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 2),
> > +		     NAND_ECCREQ(8, 512),
> > +		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
> > +					      &write_cache_variants,
> > +					      &update_cache_variants),
> > +		     0,
> > +		     SPINAND_ECCINFO(&micron_8_ooblayout,
> > +				     micron_8_ecc_get_status),
> > +		     SPINAND_SELECT_TARGET(micron_select_target)),
> >  };
> >
> >  static int micron_spinand_detect(struct spinand_device *spinand)
>=20
>=20
>=20
>=20
> Thanks,
> Miqu=E8l

Thanks,
Shiva