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Subject: Re: [PATCH] iommu: amd: Fix IOMMU perf counter clobbering during init
To:     Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
        Joerg Roedel <joro@8bytes.org>
Cc:     iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
        Shuah Khan <skhan@linuxfoundation.org>
References: <20200114151220.29578-1-skhan@linuxfoundation.org>
 <20200117100829.GE15760@8bytes.org>
 <42c0a806-9947-1401-9754-8aa88bd7062f@amd.com>
From:   Shuah Khan <skhan@linuxfoundation.org>
Message-ID: <24a46b0f-33d7-5f94-661a-80f035213892@linuxfoundation.org>
Date:   Tue, 21 Jan 2020 08:32:14 -0700
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On 1/20/20 7:10 PM, Suravee Suthikulpanit wrote:
> On 1/17/2020 5:08 PM, Joerg Roedel wrote:
>> Adding Suravee, who wrote the IOMMU Perf Counter code.
>>
>> On Tue, Jan 14, 2020 at 08:12:20AM -0700, Shuah Khan wrote:
>>> init_iommu_perf_ctr() clobbers the register when it checks write access
>>> to IOMMU perf counters and fails to restore when they are writable.
>>>
>>> Add save and restore to fix it.
>>>
>>> Signed-off-by: Shuah Khan<skhan@linuxfoundation.org>
>>> ---
>>>   drivers/iommu/amd_iommu_init.c | 22 ++++++++++++++++------
>>>   1 file changed, 16 insertions(+), 6 deletions(-)
>> Suravee, can you please review this patch?
>>
> 
> This looks ok. Does this fix certain issues? Or is this just for sanity.

I didn't notice any problems. Counters aren't writable on my system.
However, it certainly looks like a bog since registers aren't restored
like in other places in this file where such checks are done on other
registers.

I see 2 banks and 4 counters on my system. Is it sufficient to check
the first bank and first counter? In other words, if the first one
isn't writable, are all counters non-writable?

Should we read the config first and then, try to see if any of the
counters are writable? I have a patch that does that, I can send it
out for review.

> 
> Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Thanks for the review.

thanks,
-- Shuah