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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: e69621b9-10da-4205-f1b7-08d79fe30866 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Jan 2020 09:02:54.5030 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XtFLa77ZttG2cIOJF/XpgzkFPdJv3myJe3OHX30GTN2dg/JZOFOAoFIjAnVUfZlKREKmJa95IjQkE7hOZLZGMA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB3247 X-OriginatorOrg: marvell.com X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-01-22_08:2020-01-22,2020-01-22 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Store the error type in struct edac_raw_error_desc. This makes the type parameter of edac_raw_mc_handle_error() obsolete. Reported-by: kbuild test robot Signed-off-by: Robert Richter Reviewed-by: Mauro Carvalho Chehab Acked-by: Aristeu Rozanski --- drivers/edac/edac_mc.c | 10 +++++----- drivers/edac/edac_mc.h | 4 +--- drivers/edac/ghes_edac.c | 11 +++++------ include/linux/edac.h | 2 ++ 4 files changed, 13 insertions(+), 14 deletions(-) diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 1e227e69e216..8ef69d24297d 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -1086,8 +1086,7 @@ static void edac_ue_error(struct mem_ctl_info *mci, edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count); } =20 -void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type, - struct mem_ctl_info *mci, +void edac_raw_mc_handle_error(struct mem_ctl_info *mci, struct edac_raw_error_desc *e) { char detail[80]; @@ -1102,14 +1101,14 @@ void edac_raw_mc_handle_error(const enum hw_event_m= c_err_type type, =20 /* Report the error via the trace interface */ if (IS_ENABLED(CONFIG_RAS)) - trace_mc_event(type, e->msg, e->label, e->error_count, + trace_mc_event(e->type, e->msg, e->label, e->error_count, mci->mc_idx, e->top_layer, e->mid_layer, e->low_layer, (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page, grain_bits, e->syndrome, e->other_detail); =20 /* Memory type dependent details about the error */ - if (type =3D=3D HW_EVENT_ERR_CORRECTED) { + if (e->type =3D=3D HW_EVENT_ERR_CORRECTED) { snprintf(detail, sizeof(detail), "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx", e->page_frame_number, e->offset_in_page, @@ -1154,6 +1153,7 @@ void edac_mc_handle_error(const enum hw_event_mc_err_= type type, /* Fills the error report buffer */ memset(e, 0, sizeof (*e)); e->error_count =3D error_count; + e->type =3D type; e->top_layer =3D top_layer; e->mid_layer =3D mid_layer; e->low_layer =3D low_layer; @@ -1284,6 +1284,6 @@ void edac_mc_handle_error(const enum hw_event_mc_err_= type type, if (p > e->location) *(p - 1) =3D '\0'; =20 - edac_raw_mc_handle_error(type, mci, e); + edac_raw_mc_handle_error(mci, e); } EXPORT_SYMBOL_GPL(edac_mc_handle_error); diff --git a/drivers/edac/edac_mc.h b/drivers/edac/edac_mc.h index 02aac5c61d00..5d78be774f9e 100644 --- a/drivers/edac/edac_mc.h +++ b/drivers/edac/edac_mc.h @@ -212,7 +212,6 @@ extern int edac_mc_find_csrow_by_page(struct mem_ctl_in= fo *mci, * edac_raw_mc_handle_error() - Reports a memory event to userspace withou= t * doing anything to discover the error location. * - * @type: severity of the error (CE/UE/Fatal) * @mci: a struct mem_ctl_info pointer * @e: error description * @@ -220,8 +219,7 @@ extern int edac_mc_find_csrow_by_page(struct mem_ctl_in= fo *mci, * only be called directly when the hardware error come directly from BIOS= , * like in the case of APEI GHES driver. */ -void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type, - struct mem_ctl_info *mci, +void edac_raw_mc_handle_error(struct mem_ctl_info *mci, struct edac_raw_error_desc *e); =20 /** diff --git a/drivers/edac/ghes_edac.c b/drivers/edac/ghes_edac.c index b99080d8a10c..7c3e5264a41e 100644 --- a/drivers/edac/ghes_edac.c +++ b/drivers/edac/ghes_edac.c @@ -201,7 +201,6 @@ static void ghes_edac_dmidecode(const struct dmi_header= *dh, void *arg) =20 void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err) { - enum hw_event_mc_err_type type; struct edac_raw_error_desc *e; struct mem_ctl_info *mci; struct ghes_edac_pvt *pvt; @@ -240,17 +239,17 @@ void ghes_edac_report_mem_error(int sev, struct cper_= sec_mem_err *mem_err) =20 switch (sev) { case GHES_SEV_CORRECTED: - type =3D HW_EVENT_ERR_CORRECTED; + e->type =3D HW_EVENT_ERR_CORRECTED; break; case GHES_SEV_RECOVERABLE: - type =3D HW_EVENT_ERR_UNCORRECTED; + e->type =3D HW_EVENT_ERR_UNCORRECTED; break; case GHES_SEV_PANIC: - type =3D HW_EVENT_ERR_FATAL; + e->type =3D HW_EVENT_ERR_FATAL; break; default: case GHES_SEV_NO: - type =3D HW_EVENT_ERR_INFO; + e->type =3D HW_EVENT_ERR_INFO; } =20 edac_dbg(1, "error validation_bits: 0x%08llx\n", @@ -442,7 +441,7 @@ void ghes_edac_report_mem_error(int sev, struct cper_se= c_mem_err *mem_err) if (p > pvt->other_detail) *(p - 1) =3D '\0'; =20 - edac_raw_mc_handle_error(type, mci, e); + edac_raw_mc_handle_error(mci, e); =20 unlock: spin_unlock_irqrestore(&ghes_lock, flags); diff --git a/include/linux/edac.h b/include/linux/edac.h index cc31b9742684..6703eb492cd2 100644 --- a/include/linux/edac.h +++ b/include/linux/edac.h @@ -442,6 +442,7 @@ struct errcount_attribute_data { * struct edac_raw_error_desc - Raw error report structure * @grain: minimum granularity for an error report, in bytes * @error_count: number of errors of the same type + * @type: severity of the error (CE/UE/Fatal) * @top_layer: top layer of the error (layer[0]) * @mid_layer: middle layer of the error (layer[1]) * @low_layer: low layer of the error (layer[2]) @@ -462,6 +463,7 @@ struct edac_raw_error_desc { long grain; =20 u16 error_count; + enum hw_event_mc_err_type type; int top_layer; int mid_layer; int low_layer; --=20 2.20.1