Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
MIME-Version: 1.0
References: <20200123111836.7414-1-manivannan.sadhasivam@linaro.org>
 <20200123111836.7414-6-manivannan.sadhasivam@linaro.org> <CAK8P3a2pZEdsAi6YQ5z3YD=zD1iZLu+WPirhwmxeZ33k7sjkeg@mail.gmail.com>
 <20200123120050.GB8937@mani>
In-Reply-To: <20200123120050.GB8937@mani>
From:   Arnd Bergmann <arnd@arndb.de>
Date:   Thu, 23 Jan 2020 13:44:32 +0100
Message-ID: <CAK8P3a1ACFdUdEywEQRAJ=HRYOp+0Y051ffNgAgqvSgjOEGyMA@mail.gmail.com>
Subject: Re: [PATCH 05/16] bus: mhi: core: Add support for ringing
 channel/event ring doorbells
To:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc:     gregkh <gregkh@linuxfoundation.org>, smohanad@codeaurora.org,
        Jeffrey Hugo <jhugo@codeaurora.org>,
        Kalle Valo <kvalo@codeaurora.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        hemantk@codeaurora.org,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Content-Type: text/plain; charset="UTF-8"
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Thu, Jan 23, 2020 at 1:01 PM Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
> On Thu, Jan 23, 2020 at 12:39:06PM +0100, Arnd Bergmann wrote:
> > On Thu, Jan 23, 2020 at 12:19 PM Manivannan Sadhasivam
> > <manivannan.sadhasivam@linaro.org> wrote:
> >
> > > +int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl,
> > > +                             void __iomem *base, u32 offset, u32 *out)
> > > +{
> > > +       u32 tmp = readl_relaxed(base + offset);
> > ....
> > > +void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
> > > +                  u32 offset, u32 val)
> > > +{
> > > +       writel_relaxed(val, base + offset);
> >
> > Please avoid using _relaxed accessors by default, and use the regular
> > ones instead. There are a number of things that can go wrong with
> > the relaxed version, so ideally each caller should have a comment
> > explaining why this instance is safe without the barriers and why it
> > matters to not have it.
> >
> > If there are performance critical callers of mhi_read_reg/mhi_write_reg,
> > you could add mhi_read_reg_relaxed/mhi_write_reg_relaxed for those
> > and apply the same rules there.
> >
> > Usually most mmio accesses are only needed for reconfiguration or
> > other slow paths.
> >
>
> Fair point. I'll defer to readl/writel APIs and I also need to add
> le32_to_cpu/cpu_to_le32 to them.

What do you need the byteswap for? All of the above already
assume that the registers are little-endian.

       Arnd