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Thu, 23 Jan 2020 09:32:53 -0800 (PST) Received: from localhost ([2620:15c:202:1:4fff:7a6b:a335:8fde]) by smtp.gmail.com with ESMTPSA id x18sm3504185pfr.26.2020.01.23.09.32.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 23 Jan 2020 09:32:52 -0800 (PST) Date: Thu, 23 Jan 2020 09:32:50 -0800 From: Matthias Kaehlcke To: Roja Rani Yarubandi Cc: Greg Kroah-Hartman , akashast@codeaurora.org, msavaliy@qti.qualcomm.com, mgautam@codeaurora.org, skakit@codeaurora.org, Andy Gross , Bjorn Andersson , Jiri Slaby , linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, Douglas Anderson Subject: Re: [PATCH v2 1/1] tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register Message-ID: <20200123173250.GX89495@google.com> References: <20200123124802.24862-1-rojay@codeaurora.org> <20200123124802.24862-2-rojay@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20200123124802.24862-2-rojay@codeaurora.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Roja, On Thu, Jan 23, 2020 at 06:18:02PM +0530, Roja Rani Yarubandi wrote: > subject: tty: serial: qcom_geni_serial: Configure UART_IO_MACRO_CTRL register Something like 'Support pin swapping' would be more useful. > Configure UART_IO_MACRO_CTRL register if UART lines are swapped. > > Signed-off-by: Roja Rani Yarubandi > --- > drivers/tty/serial/qcom_geni_serial.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c > index ff63728a95f4..24b862937c1e 100644 > --- a/drivers/tty/serial/qcom_geni_serial.c > +++ b/drivers/tty/serial/qcom_geni_serial.c > @@ -24,6 +24,7 @@ > > /* UART specific GENI registers */ > #define SE_UART_LOOPBACK_CFG 0x22c > +#define SE_UART_IO_MACRO_CTRL 0x240 > #define SE_UART_TX_TRANS_CFG 0x25c > #define SE_UART_TX_WORD_LEN 0x268 > #define SE_UART_TX_STOP_BIT_LEN 0x26c > @@ -1260,6 +1261,7 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) > int irq; > bool console = false; > struct uart_driver *drv; > + u32 val; > > if (of_device_is_compatible(pdev->dev.of_node, "qcom,geni-debug-uart")) > console = true; > @@ -1309,6 +1311,10 @@ static int qcom_geni_serial_probe(struct platform_device *pdev) > return irq; > uport->irq = irq; > > + ret = of_property_read_u32(pdev->dev.of_node, "qcom,pin_inverse", &val); > + if (!ret) > + writel(val, uport->membase + SE_UART_IO_MACRO_CTRL); > + Which pins are/can be inversed only RX/TX or also CTS/RTS? If both pairs can be inversed individually it would be nice to support that. As Bjorn commented, it's probably better to have boolean properties and keep the magic values in the driver.