Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp1164730ybl; Thu, 23 Jan 2020 15:00:53 -0800 (PST) X-Google-Smtp-Source: APXvYqxq2yGdyIyhvUMQwc6W6Vfw9bJ6pEbt0SvdfkAj42CtjBztaH63et706vLKu/UHULeoZptK X-Received: by 2002:aca:ea43:: with SMTP id i64mr210133oih.30.1579820453146; Thu, 23 Jan 2020 15:00:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1579820453; cv=none; d=google.com; s=arc-20160816; b=i2BMwrGAt2dgFXAY7GwmGFarY9qRns+rwCJXEbzh2JphvsF31Tw+JXB/2eAnWVD08V h9+GHqW/y2pRu0q3+IoLEKvd2Q4byTq8pGgnXOSvezeJGzJBsEGrDFJSp9kV0xrAnIyr 6thIWxBGqLsotFwB2mDwdFUCMyGvxq2alBoL6TbssxKBW9c1oIhRLS47w2jrHLlN4r9K u+rWTQRhWb8foqAhXunqwx1BPFeMGDj6cw19ZL9qFN1Leideb4j4u+RzhjfNTnA7mj3T BcEBzBaq1PNw+c/FLx34UR1KYECmzlxP0VMg/F5DCwOLCMWq9oRbfoxEYCqNWIM9SaUj XKjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:user-agent:to:cc:from :subject:references:in-reply-to:content-transfer-encoding :mime-version:dkim-signature; bh=2Zezl1LGfgQM4NxOR/cg+DnBZ7P8wOVJXTA1zOGyLNM=; b=D1VzqnwdfkkkJsqDFDoRRF7Os6wusu50YzQ3Spt0htk0UUHjTDHgF9/3t2L6EWhiUO bFC1FVkWMpoS5npso6E43Y3pzs+j+56EsTO5Lmpf6zXGZd0Essvcam1TuH9FpVP8ExVf j1dHBLrb6E8aKcnttP4XEnHs/tTxTdXDu0vYMkyWMOAVB16C7xwehwDMqpyhwpSaSkqp ZGd22X91cCkJURLaAu1tbCmEF3QJtJJxk8EJW9N8cNW0UkLL9o17TNPLVDDZ9N7gUeCA WDJL+AdbbTEebhYXVZVNsDJKyc8bhjFBqzXBDQpsK8HHKTo9C1hKKw/9Qx9tVkcEWzig Dz2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="k9v1dJ/m"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a7si1892659oti.135.2020.01.23.15.00.33; Thu, 23 Jan 2020 15:00:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="k9v1dJ/m"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729714AbgAWW7H (ORCPT + 99 others); Thu, 23 Jan 2020 17:59:07 -0500 Received: from mail.kernel.org ([198.145.29.99]:40610 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727061AbgAWW7G (ORCPT ); Thu, 23 Jan 2020 17:59:06 -0500 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BF26322522; Thu, 23 Jan 2020 22:59:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1579820345; bh=2Zezl1LGfgQM4NxOR/cg+DnBZ7P8wOVJXTA1zOGyLNM=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=k9v1dJ/mHYBr4Yx69rbcudReeoRPngGNDHU4uWb8uNegwXXh0tV885FCLJoySkqTC mJ5SlVRIcNFST4swnU/ez+WtLgA9L1/Puu8DnhBKaq4NyqsYHFDg8+Myzd/Azn8GWM QFOxxnqYHgg2OfxifDwOVIR0Y7FVXhhdx8xrLW3Y= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <1575527759-26452-7-git-send-email-rajan.vaja@xilinx.com> References: <1574415814-19797-1-git-send-email-rajan.vaja@xilinx.com> <1575527759-26452-1-git-send-email-rajan.vaja@xilinx.com> <1575527759-26452-7-git-send-email-rajan.vaja@xilinx.com> Subject: Re: [PATCH v3 6/6] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag From: Stephen Boyd Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Radhey Shyam Pandey , Rajan Vaja To: Rajan Vaja , gustavo@embeddedor.com, jolly.shah@xilinx.com, m.tretter@pengutronix.de, mark.rutland@arm.com, mdf@kernel.org, michal.simek@xilinx.com, mturquette@baylibre.com, nava.manne@xilinx.com, robh+dt@kernel.org, tejas.patel@xilinx.com User-Agent: alot/0.8.1 Date: Thu, 23 Jan 2020 14:59:05 -0800 Message-Id: <20200123225905.BF26322522@mail.kernel.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Quoting Rajan Vaja (2019-12-04 22:35:59) > From: Tejas Patel >=20 > Existing clock divider functions is not checking for > base of divider. So, if any clock divider is power of 2 > then clock rate calculation will be wrong. >=20 > Add support to calculate divider value for the clocks > with CLK_DIVIDER_POWER_OF_TWO flag. >=20 > Signed-off-by: Tejas Patel > Signed-off-by: Radhey Shyam Pandey > Signed-off-by: Rajan Vaja > --- Applied to clk-next