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Date:   Sat, 25 Jan 2020 09:39:50 -0800
From:   Guenter Roeck <linux@roeck-us.net>
To:     Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc:     Russell King <linux@armlinux.org.uk>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH] ARM: 8936/1: decompressor: avoid CP15 barrier
 instructions in v7 cache setup code
Message-ID: <20200125173950.GA19126@roeck-us.net>
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Hi,

On Fri, Nov 08, 2019 at 01:44:32PM +0100, Ard Biesheuvel wrote:
> Commit e17b1af96b2afc38e684aa2f1033387e2ed10029
> 
>   "ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache"
> 
> added some explicit handling of the CP15BEN bit in the SCTLR system
> register, to ensure that CP15 barrier instructions are enabled, even
> if we enter the decompressor via the EFI stub.
> 
> However, as it turns out, there are other ways in which we may end up
> using CP15 barrier instructions without them being enabled. I.e., when
> the decompressor startup code skips the cache_on() initially, we end
> up calling cache_clean_flush() with the caches and MMU off, in which
> case the CP15BEN bit in SCTLR may not be programmed either. And in
> fact, cache_on() itself issues CP15 barrier instructions before actually
> enabling them by programming the new SCTLR value (and issuing an ISB)
> 
> Since all these routines are specific to v7, let's clean this up by
> using the ordinary v7 barrier instructions in the v7 specific cache
> handling routines, so that we never rely on the CP15 ones. This also
> avoids the issue where a barrier is required between programming SCTLR
> and using the CP15 barrier instructions, which would result in two
> different kinds of barriers being used in the same function.
> 
> Acked-by: Marc Zyngier <maz@kernel.org>
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

This patch causes all qemu emulations for ARM1176 to fail hard (stall with
no console output even with earlycon enabled). This affects witherspoon-bmc,
ast2500-evb, romulus-bmc, and swift-bmc. It does not affect emulations
for other CPU types, even with the same kernel configuration (such as
ast2600-evb).

Reverting the patch fixes the problem.

Guenter

---
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# bad: [702ccea170f07783bd002055a353a0866c062267] Add linux-next specific files for 20200124
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git bisect bad 4c1bb3d9902fbbe24efea7bae47337e51f8f112a
# good: [9b0b308a1586f620a49c50605ae8abf509190661] Merge tag 'zynq-dt-for-v5.6-v2' of https://github.com/Xilinx/linux-xlnx into arm/dt
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# good: [2e30f8d480842313c3de748bedd0a469f131f12e] Merge remote-tracking branch 'pinctrl-intel-fixes/fixes'
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# good: [9c9aa8fdf306cd7329e0a68bbcbe2f71b397dac1] kbuild: remove 'Building modules, stage 2.' log
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# bad: [290b9fa737f893f96602c158f22caacd942e1268] ARM: 8951/1: Fix Kexec compilation issue.
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# bad: [44832877ea4c186460f42e48b1da98a08a29ffb5] ARM: 8942/1: Revert "8857/1: efi: enable CP15 DMB instructions before cleaning the cache"
git bisect bad 44832877ea4c186460f42e48b1da98a08a29ffb5
# bad: [dff03da7c2b0575b8112c2947f84521aad287ae7] ARM: 8941/1: ARM/decompressor: enable CP15 barrier instructions in v7 cache setup code
git bisect bad dff03da7c2b0575b8112c2947f84521aad287ae7
# bad: [bcb704e551fc4e5034b9fa319a3ef49d30cb84d9] ARM: 8936/1: decompressor: avoid CP15 barrier instructions in v7 cache setup code
git bisect bad bcb704e551fc4e5034b9fa319a3ef49d30cb84d9
# first bad commit: [bcb704e551fc4e5034b9fa319a3ef49d30cb84d9] ARM: 8936/1: decompressor: avoid CP15 barrier instructions in v7 cache setup code