Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp456376ybl; Tue, 28 Jan 2020 06:15:59 -0800 (PST) X-Google-Smtp-Source: APXvYqwNgZsOP30ZsuZ+FMbDaRMSJ8zfQkv0Cv37czVmNlwPAhuUA5Bj9ca9uG8E+jugCnBZYo+s X-Received: by 2002:aca:cd92:: with SMTP id d140mr2870346oig.68.1580220959005; Tue, 28 Jan 2020 06:15:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1580220958; cv=none; d=google.com; s=arc-20160816; b=s1pWLsWK0wjeoFqARL/5xwAqG2sdWwtr+u/goueubLNkgM9S90z9yxKrRW1QCoP6IO 4OoohPeS6ysfaj9hAZ7+WqN5kvNRcctu+VdFwdQasnXmNLwIOBt6Mah+zerlFV17dBQ4 xnJDeSpo1ibdXPtD4FGfX/GOmFwDNH151dccNucZ469v29jo4X52pin2bgRRibIiw3Fe +Z3KtOpjICAmSd/gtLD2Dkz4mXq02E3rnymitwipRXk48kCQ5HYiLY4AoEz10xlwZCbD t2kGhHgBOU2JLEshw5E93gpyrCWWT6gpRqwzmYIfDKhhFir/aqb73mNxviDPXQPaGO/I o/lg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=47AM6Gft4nn8eNK9g8PVOPLAsjTapnHecPFGRgyCavY=; b=BliNwflryPqK6BbTGPl/o0jptlNirqSPSkzQm0IzUMYtfX1B6srPDiZCzTLiLToFe/ AXxrtqHdyzbKdN6uwdcZwo0TAm+sBje3vOfb/b3FA92/mqzYPAh3ynPDGzn7N7Br6rYl NT0XSoWzoFCoo4s+A2GEiPpoYT+gd2O861WEe3NAREXvUt65AZ/COqkYAijeqYEzcPVs y+S5q7Es1trobybuGXnXdWmB3RZ0OXSzvfsNB+Bsr0LK4sQJEwGGkxk7HXayV5bqy3Vg qb3NX0N/rMpbfCtztBsC34JvmvLtetpfoORhR70Vz/Rhj3zzkK0xy4tD5xx8OB1yByJ4 QuAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=ZICSKNeO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c67si1678503oib.276.2020.01.28.06.15.46; Tue, 28 Jan 2020 06:15:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=ZICSKNeO; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729971AbgA1OOx (ORCPT + 99 others); Tue, 28 Jan 2020 09:14:53 -0500 Received: from mail.kernel.org ([198.145.29.99]:37188 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729965AbgA1OOw (ORCPT ); Tue, 28 Jan 2020 09:14:52 -0500 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7A44024681; Tue, 28 Jan 2020 14:14:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580220890; bh=MZCeFH3/ZgirqDOHvX84LoqvRuoZtRFg7XS13nRFhF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZICSKNeO5aw1AdjG3MlgmTRjIkjxGOdtRYbhxuup1BwYHsgAO+05/+ZbL57r5qIQc jgF1/pTSebG1oIhTb1jNfHGyYsKpqxRb2IsLWkAMIVGr8PkObQ68A4DyXM1bYhmqTE MYB5sJOSw/zE9BmvK0GFMTrN3+AvL7Fh38PIOBxo= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Sam Bobroff , Alex Deucher , Sasha Levin Subject: [PATCH 4.4 157/183] drm/radeon: fix bad DMA from INTERRUPT_CNTL2 Date: Tue, 28 Jan 2020 15:06:16 +0100 Message-Id: <20200128135845.416012863@linuxfoundation.org> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200128135829.486060649@linuxfoundation.org> References: <20200128135829.486060649@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sam Bobroff [ Upstream commit 62d91dd2851e8ae2ca552f1b090a3575a4edf759 ] The INTERRUPT_CNTL2 register expects a valid DMA address, but is currently set with a GPU MC address. This can cause problems on systems that detect the resulting DMA read from an invalid address (found on a Power8 guest). Instead, use the DMA address of the dummy page because it will always be safe. Fixes: d8f60cfc9345 ("drm/radeon/kms: Add support for interrupts on r6xx/r7xx chips (v3)") Fixes: 25a857fbe973 ("drm/radeon/kms: add support for interrupts on SI") Fixes: a59781bbe528 ("drm/radeon: add support for interrupts on CIK (v5)") Signed-off-by: Sam Bobroff Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/radeon/cik.c | 4 ++-- drivers/gpu/drm/radeon/r600.c | 4 ++-- drivers/gpu/drm/radeon/si.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index 80b6d6e4721a1..7acde09c8e8fb 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -7372,8 +7372,8 @@ static int cik_irq_init(struct radeon_device *rdev) } /* setup interrupt control */ - /* XXX this should actually be a bus address, not an MC address. same on older asics */ - WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); + /* set dummy read address to dummy page address */ + WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); interrupt_cntl = RREG32(INTERRUPT_CNTL); /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 0e20c08f8977f..2056224d0b3c4 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c @@ -3647,8 +3647,8 @@ int r600_irq_init(struct radeon_device *rdev) } /* setup interrupt control */ - /* set dummy read address to ring address */ - WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); + /* set dummy read address to dummy page address */ + WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); interrupt_cntl = RREG32(INTERRUPT_CNTL); /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 5cf3a2cbc07e8..4128c98d9054e 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -6013,8 +6013,8 @@ static int si_irq_init(struct radeon_device *rdev) } /* setup interrupt control */ - /* set dummy read address to ring address */ - WREG32(INTERRUPT_CNTL2, rdev->ih.gpu_addr >> 8); + /* set dummy read address to dummy page address */ + WREG32(INTERRUPT_CNTL2, rdev->dummy_page.addr >> 8); interrupt_cntl = RREG32(INTERRUPT_CNTL); /* IH_DUMMY_RD_OVERRIDE=0 - dummy read disabled with msi, enabled without msi * IH_DUMMY_RD_OVERRIDE=1 - dummy read controlled by IH_DUMMY_RD_EN -- 2.20.1