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(Authenticated sender: koike) with ESMTPSA id AE1222942FA Subject: Re: [RFC PATCH v1 3/5] dt-binding: tegra: Add VI and CSI bindings To: Sowjanya Komatineni , thierry.reding@gmail.com, jonathanh@nvidia.com, frankc@nvidia.com, hverkuil@xs4all.nl Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <1580235801-4129-1-git-send-email-skomatineni@nvidia.com> <1580235801-4129-4-git-send-email-skomatineni@nvidia.com> From: Helen Koike Autocrypt: addr=helen.koike@collabora.com; keydata= mQINBFmOMD4BEADb2nC8Oeyvklh+ataw2u/3mrl+hIHL4WSWtii4VxCapl9+zILuxFDrxw1p XgF3cfx7g9taWBrmLE9VEPwJA6MxaVnQuDL3GXxTxO/gqnOFgT3jT+skAt6qMvoWnhgurMGH wRaA3dO4cFrDlLsZIdDywTYcy7V2bou81ItR5Ed6c5UVX7uTTzeiD/tUi8oIf0XN4takyFuV Rf09nOhi24bn9fFN5xWHJooFaFf/k2Y+5UTkofANUp8nn4jhBUrIr6glOtmE0VT4pZMMLT63 hyRB+/s7b1zkOofUGW5LxUg+wqJXZcOAvjocqSq3VVHcgyxdm+Nv0g9Hdqo8bQHC2KBK86VK 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iR1nXfMxENVYnM5ag7mBZyD/kru5W1Uj34L6AFaDMXFPwedSCpzzqUiHb0f+nYkfOodf5xy0 46+3THy/NUS/ZZp/rI4F7Y77+MQPVg7vARfHHX1AxYUKfRVW5j88QUB70txn8Vgi1tDrOr4J eD+xr0CvIGa5lKqgQacQtGkpOpJ8zY4ObSvpNubey/qYUE3DCXD0n2Xxk4muTvqlkFpOYA== Message-ID: Date: Tue, 28 Jan 2020 17:32:28 -0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.3.0 MIME-Version: 1.0 In-Reply-To: <1580235801-4129-4-git-send-email-skomatineni@nvidia.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 1/28/20 4:23 PM, Sowjanya Komatineni wrote: > Tegra contains VI controller which can support up to 6 MIPI CSI > camera sensors. > > Each Tegra CSI port from CSI unit can be one-to-one mapper to > VI channel and can capture from an external camera sensor or > from built-in test pattern generator. > > This patch adds dt-bindings for Tegra VI and CSI. > > Signed-off-by: Sowjanya Komatineni > --- > .../bindings/display/tegra/nvidia,tegra20-host1x.txt | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt > index 9999255ac5b6..47cd6532b7d3 100644 > --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt > @@ -40,7 +40,7 @@ of the following host1x client modules: > > Required properties: > - compatible: "nvidia,tegra-vi" > - - reg: Physical base address and length of the controller's registers. > + - reg: Physical base address and length of the controller registers. > - interrupts: The interrupt outputs from the controller. > - clocks: Must contain one entry, for the module clock. > See ../clocks/clock-bindings.txt for details. > @@ -49,6 +49,14 @@ of the following host1x client modules: > - reset-names: Must include the following entries: > - vi > > +- csi: mipi csi interface to vi > + > + Required properties: > + - compatible: "nvidia,tegra-csi" > + - reg: Physical base address and length of the controller registers. > + - clocks: Must contain entries csi, cilab, cilcd, cile clocks. > + See ../clocks/clock-bindings.txt for details. > + I think it would be nice to add an example, in the Example section at the end of this file, same as other modules do. Regards, Helen > - epp: encoder pre-processor > > Required properties: >