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From:   Etienne Carriere <etienne.carriere@linaro.org>
Date:   Wed, 29 Jan 2020 16:01:07 +0100
Message-ID: <CAN5uoS-cHxrFD-H245iHMU_zzk6wAL=YJvKFAY6rr2EMgd0L3w@mail.gmail.com>
Subject: Re: [PATCH v11 2/2] mailbox: introduce ARM SMC based mailbox
To:     Peng Fan <peng.fan@nxp.com>
Cc:     "f.fainelli@gmail.com" <f.fainelli@gmail.com>,
        "andre.przywara@arm.com" <andre.przywara@arm.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        etienne carriere <etienne.carriere@st.com>,
        Sudeep Holla <sudeep.holla@arm.com>
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Hello Peng,

On Mon, 27 Jan 2020 at 13:58, Peng Fan <peng.fan@nxp.com> wrote:
>
> > Subject: Re: [PATCH v11 2/2] mailbox: introduce ARM SMC based mailbox
> >
> > Hello Peng and all,
> >
> >
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > This mailbox driver implements a mailbox which signals transmitted
> > > data via an ARM smc (secure monitor call) instruction. The mailbox
> > > receiver is implemented in firmware and can synchronously return data
> > > when it returns execution to the non-secure world again.
> > > An asynchronous receive path is not implemented.
> > > This allows the usage of a mailbox to trigger firmware actions on SoCs
> > > which either don't have a separate management processor or on which
> > > such a core is not available. A user of this mailbox could be the SCP
> > > interface.
> > >
> > > Modified from Andre Przywara's v2 patch
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore
> > > .kernel.org%2Fpatchwork%2Fpatch%2F812999%2F&amp;data=02%7C01%7
> > Cpeng.fa
> > >
> > n%40nxp.com%7C735cc6cd00404082bf8c08d79f67b93a%7C686ea1d3bc2b4
> > c6fa92cd
> > >
> > 99c5c301635%7C0%7C0%7C637153140140878278&amp;sdata=m0lcAEIr0ZP
> > tyPHorSW
> > > NYgjfI5p0genJLlhqHMIHBg0%3D&amp;reserved=0
> > >
> > > Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
> > > Reviewed-by: Andre Przywara <andre.przywara@arm.com>
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >
> > I've successfully tested your change on my board. It is a stm32mp1 with TZ
> > secure hardening and I run an OP-TEE firmware (possibly a TF-A
> > sp_min) with a SCMI server for clock and reset. Upstream in progress.
> > The platform uses 2 instances of your SMC based mailbox device driver
> > (2 mailboxes). Works nice with your change.
> >
> > You can add my T-b tag: Tested-by: Etienne Carriere
> > <etienne.carriere@linaro.org>
>
> Thanks, but this patch has been dropped.
>
> Per Sudeep, we all use smc transport, not smc mailbox ,
> I'll post patch in a few days based on the transport split patch.

Ok, i am syncing.

> >
> > FYI, I'll (hopefully soon) post a change proposal in U-Boot ML for an equvalent
> > 'SMC based mailbox' driver and SCMI agent protocol/device drivers for clock
> > and reset controllers.
>
> Great to know you did scmi agent code in U-Boot. Do you have some public repo
> for access?

I've created a P-R on my github repo to share until I submit to u-boot:
 https://github.com/etienne-lms/u-boot/pull/3

I guess I will change my u-boot proposal and get a SMC SCMI transport
outside of the mailbox framework.

Regards,
Etienne


>
> Thanks,
> Peng.
>
> > I'm also working on getting this SCMI server upstream in TF-A and OP-TEE.
> > Your SMC based mailbox driver is a valuable notification scheme for our SCMI
> > services support in Arm TZ secure world.
> >
> > Regards,
> > Etienne