Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp1498446ybl; Thu, 30 Jan 2020 00:38:34 -0800 (PST) X-Google-Smtp-Source: APXvYqx14x5l9HAW8WRSFjIRlZXOvbbnycn2YDvPnWN5mi0/1u9klckOA/z+bS/tBXOn7zFB1REZ X-Received: by 2002:aca:a857:: with SMTP id r84mr2057982oie.41.1580373514799; Thu, 30 Jan 2020 00:38:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1580373514; cv=none; d=google.com; s=arc-20160816; b=rQLJcgv61PoZxSKmeUPLWvDdrXLRalu9sGKonrFNwO5Z+NGk5FrxkIS33wxOsl/ujL 0uhsANvI/oqh9c1XSmf2cSFhO3ADDP7Dz2YdyYBzNklz2743cbe3nIVRj4sibsQBwKvM 0HrYce3oPK02KMITF+8n3+rWOgNHvpqOV3Fk2QFoIw46aCSpwEY/z5LwRhSW9lwpDKQU ZGO+o8gsv7da3MGh2nMDPQtAt2J9leKzXCn9If7WrZdYHqOZOFdZWO/3cJJ3nB6pAyuJ LWRkpXXRVpOdU5IOnn70QMQHqxia1qlqnwQCiH/JgcC7/Xq40B57FdsJbyZtRlTjBrg1 46dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:organization:references:in-reply-to:date:cc:to:from :subject:message-id; bh=ikr1ST9dT8kyJesKSZy/Uqs3NKfYh+YTMBHmbTdeJbw=; b=mx6/Nk/nlAc6U126STKnXulOLQ3lEvYqxLZYIznOvbafMrupPcyblzdIBpJ5X19jmr csjn/eLaJaeAC0+ghHC0CVQk+jqS25ZaWKs/pIcz7DCXl0+1AARTEyGJ20ixbdyrlvNQ ijK9MalCTCGn5yAJV3cVsP4VGGHU0amdYUjX493xmMguXYrdnfgiePM7mI8FTJJe4NxD yozq/j2BN6nhb1cDZJIdG5HJzzROnNSaUeGOTY9OJo7hFEs27GCG2n9Ai6MZ8ltxnjeJ Byph1kJLpasmyTXHFnHRHgiOgeX0GypV2GKS0MugNxNXQF6IMR6b3UELzlzWhi1AWGH8 4T3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k15si2480985oij.134.2020.01.30.00.38.22; Thu, 30 Jan 2020 00:38:34 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726911AbgA3Ihb (ORCPT + 99 others); Thu, 30 Jan 2020 03:37:31 -0500 Received: from mga12.intel.com ([192.55.52.136]:46437 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726757AbgA3Ihb (ORCPT ); Thu, 30 Jan 2020 03:37:31 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jan 2020 00:37:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,381,1574150400"; d="scan'208";a="232837098" Received: from kvehmane-mobl.ger.corp.intel.com (HELO jsakkine-mobl1) ([10.237.50.119]) by orsmga006.jf.intel.com with ESMTP; 30 Jan 2020 00:37:26 -0800 Message-ID: Subject: Re: [PATCH v2 2/2] tpm: tis: add support for MMIO TPM on SynQuacer From: Jarkko Sakkinen To: Ard Biesheuvel Cc: Ard Biesheuvel , Linux Kernel Mailing List , linux-arm-kernel , Masahisa Kojima , Devicetree List , linux-integrity , Peter =?ISO-8859-1?Q?H=FCwe?= , Jason Gunthorpe Date: Thu, 30 Jan 2020 10:37:25 +0200 In-Reply-To: References: <20200114141647.109347-1-ardb@kernel.org> <20200114141647.109347-3-ardb@kernel.org> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.34.1-2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 2020-01-23 at 13:29 +0100, Ard Biesheuvel wrote: > On Thu, 23 Jan 2020 at 13:27, Jarkko Sakkinen > wrote: > > On Tue, 2020-01-14 at 15:16 +0100, Ard Biesheuvel wrote: > > > When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO > > > window that is backed by the SPI command sequencer in the SPI bus > > > controller. This arrangement has the limitation that only byte size > > > accesses are supported, and so we'll need to provide a separate set > > > of read and write accessors that take this into account. > > > > What is SynQuacer platform? > > > > It is an arm64 SoC manufactured by Socionext. > > > I'm also missing a resolution why tpm_tis.c is extended to handle both > > and not add tpm_tis_something.c instead. It does not follow the pattern > > we have in place (e.g. look up tpm_tis_spi.c). > > > > We could easily do that instead, if preferred. It's just that it would > duplicate a bit of code. I'm fine with that. Overally I think it is cleaner flow. /Jarkko