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[209.132.180.67]) by mx.google.com with ESMTP id k125si2742045oib.212.2020.01.30.00.55.01; Thu, 30 Jan 2020 00:55:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726922AbgA3IyI (ORCPT + 99 others); Thu, 30 Jan 2020 03:54:08 -0500 Received: from mga18.intel.com ([134.134.136.126]:25300 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726865AbgA3IyI (ORCPT ); Thu, 30 Jan 2020 03:54:08 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jan 2020 00:54:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,381,1574150400"; d="scan'208";a="318111879" Received: from sgsxdev001.isng.intel.com (HELO localhost) ([10.226.88.11]) by fmsmga001.fm.intel.com with ESMTP; 30 Jan 2020 00:54:03 -0800 From: Rahul Tanwar To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, robh@kernel.org, mark.rutland@arm.com, linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, andriy.shevchenko@intel.com, qi-ming.wu@intel.com, yixin.zhu@linux.intel.com, cheol.yong.kim@intel.com, Rahul Tanwar Subject: [PATCH v3 0/2] clk: intel: Add a new driver for a new clock controller IP Date: Thu, 30 Jan 2020 16:53:59 +0800 Message-Id: X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This series adds clock driver for Clock Generation Unit(CGU) of Lightning Mountain(LGM) SoC. Patch 1 adds common clock framework based clock driver for CGU. Patch 2 adds bindings document & include file for CGU. These patches are baselined upon Linux 5.5-rc1 at below Git link: git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git v3: - Address review concerns: Add Kconfig entry in x86 folder instead of modifying clk/Kconfig. (Andy Shevchenko) Fix coding style/convention related concerns. (Andy Shevchenko) Improve description, licensing info, rename node name correctly in dt bindings document & remove CLK_NR_CLKS from dt-bindings header file. (Stephen Boyd) Fix a build warning reported by kbuild test robot & Nathan Chancellor - Add few new clocks & rename few existing clocks. - Add more ops for ddiv & divider clk_ops. - Fix few minor bugs. - Use CLK_IS_CRITICAL flag for clocks which shall never be disabled. v2: - Move the driver to x86 folder. - Remove syscon usage. - Remove regmap based access. Use direct readl()/write() instead. Add spinlocks. - Change all enum values to capitals. - Rename all data structures & functions from intel_* to lgm_*. - Remove multiple header files. Keep only one header file. - Make probe fail when any of the clk/pll registration fails. - Fix few bugs with clk_init_data assignement. - Address review concerns for code quality/style/convention. v1: - Initial version. Rahul Tanwar (1): dt-bindings: clk: intel: Add bindings document & header file for CGU rtanwar (1): clk: intel: Add CGU clock driver for a new SoC .../devicetree/bindings/clock/intel,cgu-lgm.yaml | 40 ++ drivers/clk/Kconfig | 1 + drivers/clk/x86/Makefile | 1 + drivers/clk/x86/clk-cgu-pll.c | 189 ++++++ drivers/clk/x86/clk-cgu.c | 714 +++++++++++++++++++++ drivers/clk/x86/clk-cgu.h | 309 +++++++++ drivers/clk/x86/clk-lgm.c | 466 ++++++++++++++ include/dt-bindings/clock/intel,lgm-clk.h | 165 +++++ 8 files changed, 1885 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml create mode 100644 drivers/clk/x86/clk-cgu-pll.c create mode 100644 drivers/clk/x86/clk-cgu.c create mode 100644 drivers/clk/x86/clk-cgu.h create mode 100644 drivers/clk/x86/clk-lgm.c create mode 100644 include/dt-bindings/clock/intel,lgm-clk.h -- 2.11.0