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[209.132.180.67]) by mx.google.com with ESMTP id c3si2890834oto.151.2020.01.30.02.36.12; Thu, 30 Jan 2020 02:36:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nvidia.com header.s=n1 header.b=Xdr+1884; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727301AbgA3Ke4 (ORCPT + 99 others); Thu, 30 Jan 2020 05:34:56 -0500 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:4502 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726949AbgA3Kew (ORCPT ); Thu, 30 Jan 2020 05:34:52 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Thu, 30 Jan 2020 02:34:00 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Thu, 30 Jan 2020 02:34:51 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Thu, 30 Jan 2020 02:34:51 -0800 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 30 Jan 2020 10:34:51 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 30 Jan 2020 10:34:51 +0000 Received: from audio.nvidia.com (Not Verified[10.24.34.185]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Thu, 30 Jan 2020 02:34:50 -0800 From: Sameer Pujar To: , , CC: , , , , , , , , , , , , , , , Sameer Pujar Subject: [PATCH v2 9/9] arm64: tegra: enable AHUB modules for few Tegra chips Date: Thu, 30 Jan 2020 16:03:42 +0530 Message-ID: <1580380422-3431-10-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1580380422-3431-1-git-send-email-spujar@nvidia.com> References: <1580380422-3431-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1580380440; bh=QLJog4DfYyxTa/pGhw8zE2jdA/xz/qI7iFpPR8p4Zno=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:Content-Type; b=Xdr+1884nT/V3CnT8DtNbpGOgWygZYfG5YRoi4cWexkcgQL3t6kPLKh4HsweOruLY kAzOLNC1xQ0sgX8W/2KnoShZVe7bMacYIBtNWKNb8AhkRO9QNSbPR8Q5BQiGEZ9+EH Q3Qa5W2mKCN0X4o/QZ1Xyn9ccXC+QFxLlBlW90+0BCMMilSy19lNKP1hozWjS7j6Pe ogoaCwcB+YOnk8l2z3QQEg79ht8iTa7BnS/wKVe52cAilzf16yquunPwyKmbUgIpqG J3E6LiPdn2vdGakohHWCp6K7fR9X1JepGYYtINQBLGwKXnfFIGmweMpu8SfuCGvRGO SYt7S5/lLWFlA== Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch enables AHUB, ADMAIF modules for following Tegra platforms. Along with this specific instances of I/O modules are enabled as per the board design. * Jetson TX1 - I2S1, I2S2, I2S3, I2S4 and I2S5 - DMIC1, DMIC2 and DMIC3 * Jetson TX2 - I2S1, I2S2, I2S3, I2S4, I2S5 and I2S6 - DMIC1, DMIC2 and DMIC3 - DSPK2 * Jetson AGX Xavier - I2S1, I2S2, I2S4 and I2S6 - DMIC2 and DMIC3 - DSPK1 Signed-off-by: Sameer Pujar --- arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 48 ++++++++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 36 ++++++++++++++++ arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts | 40 ++++++++++++++++++ 3 files changed, 124 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts index f1de4ff..717993c 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts @@ -20,6 +20,54 @@ interrupt-controller@2a40000 { status = "okay"; }; + + ahub@2900800 { + status = "okay"; + + admaif@290f000 { + status = "okay"; + }; + + i2s@2901000 { + status = "okay"; + }; + + i2s@2901100 { + status = "okay"; + }; + + i2s@2901200 { + status = "okay"; + }; + + i2s@2901300 { + status = "okay"; + }; + + i2s@2901400 { + status = "okay"; + }; + + i2s@2901500 { + status = "okay"; + }; + + dmic@2904000 { + status = "okay"; + }; + + dmic@2904100 { + status = "okay"; + }; + + dmic@2904200 { + status = "okay"; + }; + + dspk@2905100 { + status = "okay"; + }; + }; }; i2c@3160000 { diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts index 985e7d8..f5d5832 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts +++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts @@ -21,6 +21,42 @@ interrupt-controller@2a40000 { status = "okay"; }; + + ahub@2900800 { + status = "okay"; + + admaif@290f000 { + status = "okay"; + }; + + i2s@2901000 { + status = "okay"; + }; + + i2s@2901100 { + status = "okay"; + }; + + i2s@2901300 { + status = "okay"; + }; + + i2s@2901500 { + status = "okay"; + }; + + dmic@2904100 { + status = "okay"; + }; + + dmic@2904200 { + status = "okay"; + }; + + dspk@2905000 { + status = "okay"; + }; + }; }; ddc: i2c@31c0000 { diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts index a3cafe3..c8d2c21 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts @@ -123,5 +123,45 @@ agic@702f9000 { status = "okay"; }; + + ahub@702d0800 { + status = "okay"; + + admaif@702d0000 { + status = "okay"; + }; + + i2s@702d1000 { + status = "okay"; + }; + + i2s@702d1100 { + status = "okay"; + }; + + i2s@702d1200 { + status = "okay"; + }; + + i2s@702d1300 { + status = "okay"; + }; + + i2s@702d1400 { + status = "okay"; + }; + + dmic@702d4000 { + status = "okay"; + }; + + dmic@702d4100 { + status = "okay"; + }; + + dmic@702d4200 { + status = "okay"; + }; + }; }; }; -- 2.7.4