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Fri, 31 Jan 2020 06:36:00 -0800 Received: from xsj-pvapsmtp01 (smtp3.xilinx.com [149.199.38.66]) by xsj-smtp-dlp2.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id 00VEZxXB026624; Fri, 31 Jan 2020 06:35:59 -0800 Received: from [172.30.17.107] by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1ixXOo-0001wY-JS; Fri, 31 Jan 2020 06:35:58 -0800 Subject: Re: [PATCH] irqchip: xilinx: Add support for multiple instances To: Mubin Usman Sayyed , tglx@linutronix.de, jason@lakedaemon.net, maz@kernel.org, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, siva.durga.paladugu@xilinx.com, anirudha.sarangi@xilinx.com References: <1580480338-3361-1-git-send-email-mubin.usman.sayyed@xilinx.com> From: Michal Simek Message-ID: <28c517f7-9cff-f897-c5a9-2216dd769c64@xilinx.com> Date: Fri, 31 Jan 2020 15:35:56 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <1580480338-3361-1-git-send-email-mubin.usman.sayyed@xilinx.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(4636009)(396003)(136003)(346002)(39860400002)(376002)(189003)(199004)(478600001)(336012)(356004)(31686004)(31696002)(2906002)(70206006)(36756003)(70586007)(5660300002)(4326008)(44832011)(107886003)(426003)(81156014)(81166006)(2616005)(8936002)(8676002)(316002)(26005)(186003)(9786002);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR02MB3242;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;MX:1;A:1; X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a44e596c-e818-4d13-b7ab-08d7a65ae79b X-MS-TrafficTypeDiagnostic: DM5PR02MB3242: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:4125; X-Forefront-PRVS: 029976C540 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ivrwIlTmDdD8a9IVaTFa14kK8x/KEkAsbuuzWio+PAVfR+DUR4Es+zFvJtlLx6t/oHbAJ9ejjB23zK8F6vJgkhrdcL2ShwvLD+CjDp7i8REsibOlnwfSR3c6e/lQnkdWKWuLTB7SWfAq9WU1bwWqFn3TAncBe1A9JfedyBxqgZLNkxofFSov6sHWcWqTWxP6cWSC9UDF7zGOe4D69gUGTVYTqRIrSAxr22oLT72wygW1t7vb611TmsFt7nRfUSi0E045mgL3A60IZecxAA/ToZR829pEbvmciV8H40VW/N86KcOnLpIt88Ha5LNwIQQPpUNiqTRLkj9ZHl5vxa59nq5qX7sbcFrDwcQmxbvnF/Zh4CdTOaMXRZcxiuZVPAeEKRdW5w4p+7zbhu0CwMNjfyWajfiSfiKsLBNdq7IIwZpgrC1CWpaGLWVyVWBevNUY X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Jan 2020 14:36:05.7942 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a44e596c-e818-4d13-b7ab-08d7a65ae79b X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.60.83];Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB3242 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 31. 01. 20 15:18, Mubin Usman Sayyed wrote: > From: Mubin Sayyed > > This patch adds support for multiple instances of > xilinx interrupt controller. Below configurations are > supported by driver, > > - peripheral->xilinx-intc->xilinx-intc->gic > - peripheral->xilinx-intc->xilinx-intc > > Signed-off-by: Anirudha Sarangi > Signed-off-by: Mubin Sayyed > --- > drivers/irqchip/irq-xilinx-intc.c | 143 +++++++++++++++++++++++--------------- > 1 file changed, 87 insertions(+), 56 deletions(-) > > diff --git a/drivers/irqchip/irq-xilinx-intc.c b/drivers/irqchip/irq-xilinx-intc.c > index e3043de..43d6e4e 100644 > --- a/drivers/irqchip/irq-xilinx-intc.c > +++ b/drivers/irqchip/irq-xilinx-intc.c > @@ -15,10 +15,11 @@ > #include > #include > #include > -#include > #include > #include > > +static struct xintc_irq_chip *primary_intc; nit: please place it below xintc_irq_chip. > + > /* No one else should require these constants, so define them locally here. */ > #define ISR 0x00 /* Interrupt Status Register */ > #define IPR 0x04 /* Interrupt Pending Register */ > @@ -32,35 +33,40 @@ > #define MER_ME (1<<0) > #define MER_HIE (1<<1) > > -static DEFINE_STATIC_KEY_FALSE(xintc_is_be); I am playing with this driver a little bit now and I pretty much dislike remove this. I haven't see any configuration which mixes little and big endian together. That's why I prefer not to create read_fn/write_fn hooks. Thanks, Michal