Received: by 2002:a25:8b91:0:0:0:0:0 with SMTP id j17csp3224800ybl; Sun, 2 Feb 2020 18:09:26 -0800 (PST) X-Google-Smtp-Source: APXvYqy96oIAKqSiPIU9egd2NYWprX/qe8R+onH9iRAXCuSblGDZHYPQ9zDMDkhiNWaBsd+Y2soc X-Received: by 2002:a05:6830:1e2b:: with SMTP id t11mr16735258otr.81.1580695766070; Sun, 02 Feb 2020 18:09:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1580695766; cv=none; d=google.com; s=arc-20160816; b=X0vdi+L/LFm/SkDxKJ0YbC4ylr91D4Ek6hxcSk+aZgxZkhS+xldLjQjfdd/PK/++5L 3jCN8zF/wj+pgA2TVyf2B4Nq3mUxNAr0i/xF+o85NzBpCRQvTqYq2xqHPu0DvOsGGHDx fOOrnf58Lx3YZGktVk1EPqNLSLRkkXKFcKrqUNqWFBJal8TBCideZ64Jhh+ypgEh002f HFaqiam5lrTAHnptGg7jcFGBgLamqN25nLBzx23cKRc3QRNPneIe8S+gteyzNPhisQiT 1cHgE7AEoYS48vqvIQCWFVrUnwACggsMwQ5Qa3k8gspTzw0taHAN1vnRMEOWHOjFoGJE Fqyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=0dvPytXJSrMRsfo04SBdUfjJdiPgt8LyFDxEpmk5VQM=; b=qC4UcsfXwNAM0Jnxa3VycccJm65ooEFlTvDL8l1qEN6slZBAthI4jh6hdsjc/EuIvi +U01BLvyh5vhmD3e9+9IT6/yQNx1NdN/5YChVVBIl+yAKooXOOiHKnDDjO1ojP66iHGr rw9flvbRsiOKkgiFgk8HYZvIpbnGDnRgTCRN43HsCbV2ASImuzdNbRxhLswVuYl6UkKF E+tvJwK/85+dL3+qVq0TNXXUSq4lK6EDYspnOjgalcYk//IZ1Mw9YRHkLM8mzYyy7woq U0A9QmSRAjquA4cQZNwR8PHg0qYFobpRkslkysQEzuhxoqGWHK9GtwF33d3Q1YQPEFiI PLAQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LgQSPSm8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w9si8790201otl.138.2020.02.02.18.09.03; Sun, 02 Feb 2020 18:09:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LgQSPSm8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727278AbgBCCHr (ORCPT + 99 others); Sun, 2 Feb 2020 21:07:47 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:42426 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726393AbgBCCHr (ORCPT ); Sun, 2 Feb 2020 21:07:47 -0500 Received: by mail-pl1-f195.google.com with SMTP id e8so2592402plt.9 for ; Sun, 02 Feb 2020 18:07:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0dvPytXJSrMRsfo04SBdUfjJdiPgt8LyFDxEpmk5VQM=; b=LgQSPSm8xD41YyMhV/kmpwWl8wf3WsOqLeZJdYT2DNy/R5BQKfdA2baKU1+GP1G4mg bYgvniW2Fs6jLybrVJCEEW/4Vf9sYJd78wkVFycv/ulCJ2TwqJvP3HM5biZ5aZj0PmuQ 4ROmVfi0rKOcCcl7axf4M7lIb+36sezchU860j3D2UCzcOrgsAbQo4SbiQdSIzyu2JJ2 4TAyZ5UuU3j/rBEzSJ1LcayeRPtx8rCMYVyVDdJlfm329UA7MupRi12mAWXxW0YGHi5R APJmVVi5IsS6X45T5jCrTasH0G6DKII799A8b3Mf+WldUt0PvktPkyMnEmWnmp2f6S0d rmuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0dvPytXJSrMRsfo04SBdUfjJdiPgt8LyFDxEpmk5VQM=; b=pQ0W4bgY4xdxc4L0VzLwwzs8xqagG/NQPZddJHCQOpDU6CciyP3getACGxH7KaWRfR SAHc9yyB2HCWDBbkPfXS0Ml4OhLp00xV8HCg92ih/GfdWekQQfImbi2Vk61L6Qf7L1K4 pQhM7uBvyzkbDN/nogqd/jNCLdcMu45piGcJneU4A6eHRes1CpNFpBw0V90GENZaWkKq dV4qoCF7wZCxB0HyeqHpGlpLqiYEplDN/nLLz9y+nqSDUgnKRvzTWxXrehnFBxABQX/M XRBCb4L0Dp60sa5Bm0NKt3d4vdFCFucT46IlBFJmtYuIVwR/auf7nrzAXhiL22y+HI33 uzZg== X-Gm-Message-State: APjAAAWDxbqwQsVowGJ1c6Os/sp0fV8J6SgKhAbyFKBbV7LMcqQ7b67I Wfv9ZlS8sIaZCKsAI4fojp9Bgg== X-Received: by 2002:a17:902:5a44:: with SMTP id f4mr15550715plm.328.1580695666435; Sun, 02 Feb 2020 18:07:46 -0800 (PST) Received: from localhost.localdomain (li1441-214.members.linode.com. [45.118.134.214]) by smtp.gmail.com with ESMTPSA id z29sm17521201pgc.21.2020.02.02.18.07.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Feb 2020 18:07:46 -0800 (PST) From: Leo Yan To: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mike Leach , Robert Walker , Coresight ML Cc: Leo Yan Subject: [PATCH v4 1/5] perf cs-etm: Refactor instruction size handling Date: Mon, 3 Feb 2020 10:07:12 +0800 Message-Id: <20200203020716.31832-2-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200203020716.31832-1-leo.yan@linaro.org> References: <20200203020716.31832-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org cs-etm.c has several functions which need to know instruction size based on address, e.g. cs_etm__instr_addr() and cs_etm__copy_insn() two functions both calculate the instruction size separately with its duplicated code. Furthermore, adding new features later which might require to calculate instruction size as well. For this reason, this patch refactors the code to introduce a new function cs_etm__instr_size(), this function is central place to calculate the instruction size based on ISA type and instruction address. For a neat implementation, cs_etm__instr_addr() will always execute the loop without checking ISA type, this allows cs_etm__instr_size() and cs_etm__instr_addr() have no any duplicate code with each other and both functions are independent and can be changed separately without breaking anything. As a side effect, cs_etm__instr_addr() will do a few more iterations for A32/A64 instructions, this would be fine if consider perf is a tool running in the user space. Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 48 +++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 20 deletions(-) diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 720108bd8dba..cb6fcc2acca0 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -918,6 +918,26 @@ static inline int cs_etm__t32_instr_size(struct cs_etm_queue *etmq, return ((instrBytes[1] & 0xF8) >= 0xE8) ? 4 : 2; } +static inline int cs_etm__instr_size(struct cs_etm_queue *etmq, + u8 trace_chan_id, + enum cs_etm_isa isa, + u64 addr) +{ + int insn_len; + + /* + * T32 instruction size might be 32-bit or 16-bit, decide by calling + * cs_etm__t32_instr_size(). + */ + if (isa == CS_ETM_ISA_T32) + insn_len = cs_etm__t32_instr_size(etmq, trace_chan_id, addr); + /* Otherwise, A64 and A32 instruction size are always 32-bit. */ + else + insn_len = 4; + + return insn_len; +} + static inline u64 cs_etm__first_executed_instr(struct cs_etm_packet *packet) { /* Returns 0 for the CS_ETM_DISCONTINUITY packet */ @@ -942,19 +962,15 @@ static inline u64 cs_etm__instr_addr(struct cs_etm_queue *etmq, const struct cs_etm_packet *packet, u64 offset) { - if (packet->isa == CS_ETM_ISA_T32) { - u64 addr = packet->start_addr; + u64 addr = packet->start_addr; - while (offset) { - addr += cs_etm__t32_instr_size(etmq, - trace_chan_id, addr); - offset--; - } - return addr; + while (offset) { + addr += cs_etm__instr_size(etmq, trace_chan_id, + packet->isa, addr); + offset--; } - /* Assume a 4 byte instruction size (A32/A64) */ - return packet->start_addr + offset * 4; + return addr; } static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq, @@ -1094,16 +1110,8 @@ static void cs_etm__copy_insn(struct cs_etm_queue *etmq, return; } - /* - * T32 instruction size might be 32-bit or 16-bit, decide by calling - * cs_etm__t32_instr_size(). - */ - if (packet->isa == CS_ETM_ISA_T32) - sample->insn_len = cs_etm__t32_instr_size(etmq, trace_chan_id, - sample->ip); - /* Otherwise, A64 and A32 instruction size are always 32-bit. */ - else - sample->insn_len = 4; + sample->insn_len = cs_etm__instr_size(etmq, trace_chan_id, + packet->isa, sample->ip); cs_etm__mem_access(etmq, trace_chan_id, sample->ip, sample->insn_len, (void *)sample->insn); -- 2.17.1