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[73.241.114.122]) by smtp.gmail.com with ESMTPSA id 13sm17717043pfi.78.2020.02.02.20.08.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Feb 2020 20:08:40 -0800 (PST) Date: Sun, 2 Feb 2020 20:08:38 -0800 From: Richard Cochran To: christopher.s.hall@intel.com Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, hpa@zytor.com, mingo@redhat.com, x86@kernel.org, jacob.e.keller@intel.com, davem@davemloft.net, sean.v.kelley@intel.com Subject: Re: [Intel PMC TGPIO Driver 0/5] Add support for Intel PMC Time GPIO Driver with PHC interface changes to support additional H/W Features Message-ID: <20200203040838.GA5851@localhost> References: <20191211214852.26317-1-christopher.s.hall@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191211214852.26317-1-christopher.s.hall@intel.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 11, 2019 at 01:48:47PM -0800, christopher.s.hall@intel.com wrote: > The ART frequency is not adjustable. In order, to implement output > adjustments an additional edge-timestamp API is added, as well, as > a periodic output frequency adjustment API. Togther, these implement > equivalent functionality to the existing SYS_OFFSET_* and frequency > adjustment APIs. I don't see a reason for a custom, new API just for this device. The TGPIO input clock, the ART, is a free running counter, but you want to support frequency adjustments. Use a timecounter cyclecounter pair. Let the user dial a periodic output signal in the normal way. Let the user change the frequency in the normal way, and during this call, adjust the counter values accordingly. Thanks, Richard