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[209.132.180.67]) by mx.google.com with ESMTP id v141si7709880oif.161.2020.02.03.08.04.48; Mon, 03 Feb 2020 08:05:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@st.com header.s=STMicroelectronics header.b=WnTuk7qJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728382AbgBCOFB (ORCPT + 99 others); Mon, 3 Feb 2020 09:05:01 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:37422 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728348AbgBCOFA (ORCPT ); Mon, 3 Feb 2020 09:05:00 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 013E3FW8024581; Mon, 3 Feb 2020 15:04:48 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=td/ccdvCFi5JOo4jtfLnLcltlvnCuELMxJV2NiVAr8g=; b=WnTuk7qJy2TQLvKfm68XWpMA7DQAXqk/EBRBPC5iG8+HOK1U9ZMidK6MVJKVKTLlykZy JEo9za4dYdXVnFUBB3id1nPjyfnwMqohzk5u+/LWC63N2a1aGI1fqHfcE3Vm6pH/r4UP YNFbpH3MT42lUssUn9g5y8Rn2AMScZPEeXciRvbU0HVf6V3WTVGQwvNozCoUc9v55OMk FFuKc9RJhxeUZsvnoa7+Q8hJsGieBxnIFUKnNVLfB87aG+HQ7PXaOaTnHP7K//ezQ/Xu XF9No8CvHSiL9uhInJ6NT/jctS/XEWLOVtJE4yljbUsBtK52cKuR0uFGBD1JEwFFVAq0 sw== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2xw13nhbam-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 03 Feb 2020 15:04:48 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 6C41610002A; Mon, 3 Feb 2020 15:04:44 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 5E2C72AAB83; Mon, 3 Feb 2020 15:04:44 +0100 (CET) Received: from localhost (10.75.127.44) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 3 Feb 2020 15:04:43 +0100 From: Erwan Le Ray To: Russell King , Maxime Coquelin , Alexandre Torgue , Arnd Bergmann , Linus Walleij , Olof Johansson CC: , , , Sascha Hauer , Geert Uytterhoeven , Nathan Huckleberry , Gerald Baeza , Erwan Le Ray , Clement Peron , Fabrice Gasnier Subject: [PATCH v3 3/4] ARM: debug: stm32: add UART early console support for STM32H7 Date: Mon, 3 Feb 2020 15:04:24 +0100 Message-ID: <20200203140425.26579-4-erwan.leray@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200203140425.26579-1-erwan.leray@st.com> References: <20200203140425.26579-1-erwan.leray@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG1NODE3.st.com (10.75.127.3) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138,18.0.572 definitions=2020-02-03_04:2020-02-02,2020-02-03 signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support of early console for STM32H7. Default UART instance is USART1, but other UART instances can be configured by setting physical and virtual base addresses in menuconfig. Signed-off-by: Erwan Le Ray diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5ff66c294a5a..e5e1703a89c0 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1223,6 +1223,18 @@ choice If unsure, say N. + config STM32H7_DEBUG_UART + bool "Use STM32H7 UART for low-level debug" + depends on MACH_STM32H743 + select DEBUG_STM32_UART + help + Say Y here if you want kernel low-level debugging support + on STM32H7 based platforms, which default UART is wired on + USART1, but another UART instance can be selected by modifying + CONFIG_DEBUG_UART_PHYS. + + If unsure, say N. + config TEGRA_DEBUG_UART_AUTO_ODMDATA bool "Kernel low-level debugging messages via Tegra UART via ODMDATA" depends on ARCH_TEGRA @@ -1621,7 +1633,8 @@ config DEBUG_UART_PHYS default 0x3e000000 if DEBUG_BCM_KONA_UART default 0x3f201000 if DEBUG_BCM2836 default 0x4000e400 if DEBUG_LL_UART_EFM32 - default 0x40011000 if STM32F4_DEBUG_UART || STM32F7_DEBUG_UART + default 0x40011000 if STM32F4_DEBUG_UART || STM32F7_DEBUG_UART || \ + STM32H7_DEBUG_UART default 0x40028000 if DEBUG_AT91_SAMV7_USART1 default 0x40081000 if DEBUG_LPC18XX_UART0 default 0x40090000 if DEBUG_LPC32XX diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S index b0c7034b33d9..5a2e2b065340 100644 --- a/arch/arm/include/debug/stm32.S +++ b/arch/arm/include/debug/stm32.S @@ -9,7 +9,7 @@ #define STM32_USART_TDR_OFF 0x04 #endif -#ifdef CONFIG_STM32F7_DEBUG_UART +#if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) #define STM32_USART_SR_OFF 0x1C #define STM32_USART_TDR_OFF 0x28 #endif -- 2.17.1