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From:   Fabio Estevam <festevam@gmail.com>
Date:   Mon, 3 Feb 2020 11:22:33 -0300
Message-ID: <CAOMZO5CRwOpNUtUqTmdvV0Yz=fRadjYwpv19KZyhdc-ea0+_ZA@mail.gmail.com>
Subject: Re: [PATCH] ARM: imx: limit errata selection to Cortex-A9 based designs
To:     Stefan Agner <stefan@agner.ch>
Cc:     Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Russell King - ARM Linux <linux@armlinux.org.uk>,
        Sascha Hauer <kernel@pengutronix.de>,
        NXP Linux Team <linux-imx@nxp.com>,
        Arnd Bergmann <arnd@arndb.de>,
        Yongcai Huang <Anson.Huang@nxp.com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@lists.infradead.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Stefan Agner <stefan.agner@toradex.com>
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Hi Stefan,

On Sun, Feb 2, 2020 at 4:30 PM Stefan Agner <stefan@agner.ch> wrote:
>
> From: Stefan Agner <stefan.agner@toradex.com>
>
> The two erratas 754322 and 775420 are Cortex-A9 specific. Only
> select the erratas for SoC which use a Cortex-A9.

Change looks good.

It is not clear from the commit log, which SoC selects the errata
incorrectly though.

I would mention that i.MX6UL is based on Cortex-A7 and hence should
not select them.

Otherwise, only by looking at this patch context and commit log, we
cannot notice the problem.

Reviewed-by: Fabio Estevam <festevam@gmail.com>