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[209.132.180.67]) by mx.google.com with ESMTP id r26si7867641otk.79.2020.02.04.02.59.27; Tue, 04 Feb 2020 02:59:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dDsXTEAw; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727124AbgBDK6E (ORCPT + 99 others); Tue, 4 Feb 2020 05:58:04 -0500 Received: from mail-qk1-f196.google.com ([209.85.222.196]:40083 "EHLO mail-qk1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726631AbgBDK6E (ORCPT ); Tue, 4 Feb 2020 05:58:04 -0500 Received: by mail-qk1-f196.google.com with SMTP id b7so2212814qkl.7 for ; Tue, 04 Feb 2020 02:58:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=NMkyhVQSWvkEio+aMy2Gad6E8U/YVr2WvfbqrIM79Ns=; b=dDsXTEAwh3dw/aFpDHOSx/OkiR/dsRVQgWaqh/SmX9VrwPf88A3B/TVUN0PSbdTQYj lZFmOK2ulhEsePjtkVF/4C/B4IupUXnqdIpRVSJRaWy9kyjY68vsl5j7PaoeyFdqU+o0 jka4e73H48C6I9RUBHYWoNW28ZBnq55U0uLzMqC++YRHovqVCZYGUA99ljOsGx1AnWb7 8SKe0YFxMl9p3OOcrGVxjKh74ghwXEPVw3pa8bDymu0VRIm6waXfy22wQQS1qWyqipCG 9d8P1fB8zHSuh9ls6JnYc+Ds7FRQJE7aYXW0SpkwtFUa6JD5u8aLJtQbaApeGsf9KX9P HQZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=NMkyhVQSWvkEio+aMy2Gad6E8U/YVr2WvfbqrIM79Ns=; b=qh+3NC4rOBBo/JkqH2TmEUqlSFljNoE5Bh7qoUBBy3uwayMeIWTxfnVgEU1Pa5scpq K+ZQYsrMipfd5jeLeyE9c7AlfbYvZoMAKKLQz0Vvv1WTD5kM6S+SZMeXRVQnZyjSKeDW 5oBT1lWmKdn/h6Xy3WTFbt9S1J7vFuFBnWpGf0Fqf5NvVbk1WaLbskDlshvjswvMdMOa tGMU5NLsAJDJcIrY2579QBK8J2UqqztiI20o1fdN1ARQZhj8WuE8sWWg+VzpaEWVpHGl Inbrb8V/O4wZnZbEv+r7zNBw/8wWA+wcJmu7HYuMZ52kK7ugDqntVoo4owYkmKHbcdzw 19MA== X-Gm-Message-State: APjAAAVoobvndh5mFYuDbisZLj/ZzlMuaUtmptENfv9PQjmIlDwqAVwj f0Am6QIHbPWJJgyQkCcTFqc1FHV6Q9LRfI1sBG52vA== X-Received: by 2002:a37:9c07:: with SMTP id f7mr28691354qke.103.1580813882093; Tue, 04 Feb 2020 02:58:02 -0800 (PST) MIME-Version: 1.0 References: <1579601632-7001-1-git-send-email-yannick.fertre@st.com> <2b967bed-c2fa-1575-3e06-ae5b19069e56@st.com> In-Reply-To: <2b967bed-c2fa-1575-3e06-ae5b19069e56@st.com> From: Benjamin Gaignard Date: Tue, 4 Feb 2020 11:57:51 +0100 Message-ID: Subject: Re: [PATCH] drm/stm: ltdc: add number of interrupts To: Philippe CORNU Cc: Yannick FERTRE , Benjamin GAIGNARD , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre TORGUE , "dri-devel@lists.freedesktop.org" , "linux-stm32@st-md-mailman.stormreply.com" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le jeu. 23 janv. 2020 =C3=A0 10:49, Philippe CORNU = a =C3=A9crit : > > Dear Yannick, > Thank you for your patch, > > Acked-by: Philippe Cornu > > Philippe :-) > > On 1/21/20 11:13 AM, Yannick Fertre wrote: > > The number of interrupts depends on the ltdc version. > > Don't try to get interrupt which not exist, avoiding > > kernel warning messages. Applied on drm-misc-next. Thanks, Benjamin > > > > Signed-off-by: Yannick Fertre > > --- > > drivers/gpu/drm/stm/ltdc.c | 30 +++++++++++++++--------------- > > drivers/gpu/drm/stm/ltdc.h | 1 + > > 2 files changed, 16 insertions(+), 15 deletions(-) > > > > diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c > > index c2815e8..58092b0 100644 > > --- a/drivers/gpu/drm/stm/ltdc.c > > +++ b/drivers/gpu/drm/stm/ltdc.c > > @@ -1146,12 +1146,14 @@ static int ltdc_get_caps(struct drm_device *dde= v) > > ldev->caps.pad_max_freq_hz =3D 90000000; > > if (ldev->caps.hw_version =3D=3D HWVER_10200) > > ldev->caps.pad_max_freq_hz =3D 65000000; > > + ldev->caps.nb_irq =3D 2; > > break; > > case HWVER_20101: > > ldev->caps.reg_ofs =3D REG_OFS_4; > > ldev->caps.pix_fmt_hw =3D ltdc_pix_fmt_a1; > > ldev->caps.non_alpha_only_l1 =3D false; > > ldev->caps.pad_max_freq_hz =3D 150000000; > > + ldev->caps.nb_irq =3D 4; > > break; > > default: > > return -ENODEV; > > @@ -1251,13 +1253,21 @@ int ltdc_load(struct drm_device *ddev) > > reg_clear(ldev->regs, LTDC_IER, > > IER_LIE | IER_RRIE | IER_FUIE | IER_TERRIE); > > > > - for (i =3D 0; i < MAX_IRQ; i++) { > > + ret =3D ltdc_get_caps(ddev); > > + if (ret) { > > + DRM_ERROR("hardware identifier (0x%08x) not supported!\n"= , > > + ldev->caps.hw_version); > > + goto err; > > + } > > + > > + DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_versio= n); > > + > > + for (i =3D 0; i < ldev->caps.nb_irq; i++) { > > irq =3D platform_get_irq(pdev, i); > > - if (irq =3D=3D -EPROBE_DEFER) > > + if (irq < 0) { > > + ret =3D irq; > > goto err; > > - > > - if (irq < 0) > > - continue; > > + } > > > > ret =3D devm_request_threaded_irq(dev, irq, ltdc_irq, > > ltdc_irq_thread, IRQF_ONE= SHOT, > > @@ -1268,16 +1278,6 @@ int ltdc_load(struct drm_device *ddev) > > } > > } > > > > - > > - ret =3D ltdc_get_caps(ddev); > > - if (ret) { > > - DRM_ERROR("hardware identifier (0x%08x) not supported!\n"= , > > - ldev->caps.hw_version); > > - goto err; > > - } > > - > > - DRM_DEBUG_DRIVER("ltdc hw version 0x%08x\n", ldev->caps.hw_versio= n); > > - > > /* Add endpoints panels or bridges if any */ > > for (i =3D 0; i < MAX_ENDPOINTS; i++) { > > if (panel[i]) { > > diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h > > index a1ad0ae..310e87f 100644 > > --- a/drivers/gpu/drm/stm/ltdc.h > > +++ b/drivers/gpu/drm/stm/ltdc.h > > @@ -19,6 +19,7 @@ struct ltdc_caps { > > const u32 *pix_fmt_hw; /* supported pixel formats */ > > bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1= */ > > int pad_max_freq_hz; /* max frequency supported by pad */ > > + int nb_irq; /* number of hardware interrupts */ > > }; > > > > #define LTDC_MAX_LAYER 4 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel