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Tue, 4 Feb 2020 13:41:09 +0000 From: peng.fan@nxp.com To: shawnguo@kernel.org, s.hauer@pengutronix.de, sboyd@kernel.org, abel.vesa@nxp.com, aisheng.dong@nxp.com, leonard.crestez@nxp.com Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, ping.bai@nxp.com, Anson.Huang@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Peng Fan Subject: [PATCH 0/7] ARM: imx: imx7ulp: add cpufreq support Date: Tue, 4 Feb 2020 21:34:30 +0800 Message-Id: <1580823277-13644-1-git-send-email-peng.fan@nxp.com> X-Mailer: git-send-email 2.7.4 Content-Type: text/plain X-ClientProxiedBy: HK0PR03CA0107.apcprd03.prod.outlook.com (2603:1096:203:b0::23) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) MIME-Version: 1.0 Received: from localhost.localdomain (119.31.174.66) by HK0PR03CA0107.apcprd03.prod.outlook.com (2603:1096:203:b0::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.2686.28 via Frontend Transport; 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X-Microsoft-Antispam-Message-Info: Gbj7O3cxuqi5rMuqGvXyd9YZmiP1nrJK+cU+je2Y8r3BD/euEfiFxv574iVrRfoSkpbsGkh2s5afXk2nqJSarTpPPoyTzRLZGPR4dDeDgmdFbtNy638g6A9P8sG4WnZoWGq9/9g2aWa41iXUXyvqSF6dE2r0cAFmFRMR0T9Cv3iqe7qNnDwS3ZqtZs6Trwfb0vEaiteWdgKr8PpoJ1KTImTSMS6HJYmJUY+pB8Uq/2uO968dtSI0qFvZXW8H1J/Jg5p9ox5bmYDJ0HXdZpXLuF5SuzpA+JZCyLB1r42k2ulphhJJRC+mVqdIYP+g70xEFmkbPGZeC7OOeBtiOOjv7NlBU41BPm5ZQcfly03Vwa0fA8oIzjS/WrR7oylBH0rwEssvZrV9bsm9qT+6jjI6JVRWYXDxz/B1a089srNtlpERunAsfSR0USSFwJ2BZGw4ArNZm5vG+w9MYHrVbIy8o5F7DBxhDnhbDgxLEeR5QBWnnmRTo6FKbL0imgHXO6mJW8Qc//WOmsB2oM/llVxsbwjhAnLJrh2y88AggqNIjSE= X-MS-Exchange-AntiSpam-MessageData: B3BDUcnekYlAqAfYWhbjKV/rUrJ3Ln1E+okJ8/UErVjzSyLKHiZSe7Jb3x2oqJCaMIjg4zltV5iQnKbEIt1r2LvzLuKoD3fUjRMaTpFYYPLR9mEOeTBHyx1FEzWGpQVr9JXAEUy1dcM/q0sNUD0Z+A== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5943aa3c-205d-4ba7-e5a0-08d7a977e44c X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2020 13:41:09.4160 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: U+uhDKtLu9QPXdoXzG0FEmOXBqU1ULkIc/Sq1pKJnPmGRNBm9K9j4vEIyuZlOl9Vd3gH9rCgVCvjSoHzVT5gBQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6932 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Peng Fan This patchset aims to use cpufreq-dt for i.MX7ULP to avoid plaform specific cpufreq driver. To use cpufreq-dt, we need a ARM core clock that could be easy to support freq change. However i.MX7ULP has some specific design that we could reuse imx_hw_clk_cpu that used on i.MX7D/8M. So introduced a new api imx_hw_clk_cpuv2 to add a virtual clk that could support ARM core freq change easily. Patch 1,2 is to change pfdv2 to make it could determine best parent clk, then we could directly configure pfdv2 to get the best clk per i.MX7ULP datasheet "6.2.4 PLL PFD output" I have tested with following diff applied, and mark fsl,imx7ulp as blacklist in cpufreq-dt driver(I also send out when this patchset is ok) diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index ab91c98f2124..11085b06506e 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -41,9 +41,29 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0xf00>; + clocks = <&smc1 IMX7ULP_CLK_ARM_FREQ>; + clock-frequency = <500210000>; + operating-points-v2 = <&cpu0_opp_table>; }; }; + cpu0_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-500210000 { + opp-hz = /bits/ 64 <500210000>; + /*opp-microvolt = <1025000>;*/ + clock-latency-ns = <150000>; + }; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + /*opp-microvolt = <1125000>;*/ + clock-latency-ns = <150000>; + }; + }; + I not include the voltage configuration, because imx-rpmsg and pf1550 rpmsg driver still not upstreamed. So I not included dts in this patchset, when imx-rpmsg and pf1550 ready, the dts part could be added then. Anson Huang (1): clk: imx: Fix division by zero warning on pfdv2 Peng Fan (6): clk: imx: pfdv2: switch to use determine_rate clk: imx: pfdv2: determine best parent rate clk: imx: add imx_hw_clk_cpuv2 for i.MX7ULP clk: imx: imx7ulp: add IMX7ULP_CLK_ARM_FREQ clk ARM: imx: imx7ulp: support HSRUN mode ARM: imx: imx7ulp: create cpufreq device arch/arm/mach-imx/mach-imx7ulp.c | 2 + arch/arm/mach-imx/pm-imx7ulp.c | 4 + drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-cpuv2.c | 137 ++++++++++++++++++++++++++++++ drivers/clk/imx/clk-imx7ulp.c | 15 +++- drivers/clk/imx/clk-pfdv2.c | 61 +++++++++---- drivers/clk/imx/clk.h | 9 ++ include/dt-bindings/clock/imx7ulp-clock.h | 3 +- 8 files changed, 212 insertions(+), 20 deletions(-) create mode 100644 drivers/clk/imx/clk-cpuv2.c -- 2.16.4