Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
MIME-Version: 1.0
References: <20200203015203.27882-1-leo.yan@linaro.org> <20200203015203.27882-3-leo.yan@linaro.org>
In-Reply-To: <20200203015203.27882-3-leo.yan@linaro.org>
From:   Mike Leach <mike.leach@linaro.org>
Date:   Wed, 5 Feb 2020 16:01:11 +0000
Message-ID: <CAJ9a7VhLHo9akNjdOKZvG8tAt=OLrdpyCnY03+PwNNq=K1=mCA@mail.gmail.com>
Subject: Re: [PATCH v3 2/5] perf cs-etm: Continuously record last branch
To:     Leo Yan <leo.yan@linaro.org>
Cc:     Arnaldo Carvalho de Melo <acme@kernel.org>,
        Mathieu Poirier <mathieu.poirier@linaro.org>,
        Suzuki K Poulose <suzuki.poulose@arm.com>,
        Peter Zijlstra <peterz@infradead.org>,
        Ingo Molnar <mingo@redhat.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Jiri Olsa <jolsa@redhat.com>,
        Namhyung Kim <namhyung@kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        linux-kernel@vger.kernel.org,
        Robert Walker <robert.walker@arm.com>,
        Coresight ML <coresight@lists.linaro.org>
Content-Type: text/plain; charset="UTF-8"
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

On Mon, 3 Feb 2020 at 01:52, Leo Yan <leo.yan@linaro.org> wrote:
>
> Every time synthesize instruction sample, the last branch recording
> will be reset.  This is fine if the instruction period is big enough,
> for example if use the option '--itrace=i100000', the last branch
> array is reset for every sample with 100000 instructions per period;
> before generate the next instruction sample, there has the sufficient
> packets coming to fill the last branch array.
>
> On the other hand, if set a very small period, the packets will be
> significantly reduced between two continuous instruction samples, thus
> the last branch array is almost empty for new instruction sample by
> frequently resetting.
>
> To allow the last branches to work properly for any instruction periods,
> this patch avoids to reset the last branch for every instruction sample
> and only reset it when flush the trace data.  The last branches will
> be reset only for two cases, one is for trace starting, another case
> is for discontinuous trace; other cases can keep recording last branches
> for continuous instruction samples.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
> ---
>  tools/perf/util/cs-etm.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
> index 3dd5ba34a2c2..3e28462609e7 100644
> --- a/tools/perf/util/cs-etm.c
> +++ b/tools/perf/util/cs-etm.c
> @@ -1153,9 +1153,6 @@ static int cs_etm__synth_instruction_sample(struct cs_etm_queue *etmq,
>                         "CS ETM Trace: failed to deliver instruction event, error %d\n",
>                         ret);
>
> -       if (etm->synth_opts.last_branch)
> -               cs_etm__reset_last_branch_rb(tidq);
> -
>         return ret;
>  }
>
> @@ -1488,6 +1485,10 @@ static int cs_etm__flush(struct cs_etm_queue *etmq,
>                 tidq->prev_packet = tmp;
>         }
>
> +       /* Reset last branches after flush the trace */
> +       if (etm->synth_opts.last_branch)
> +               cs_etm__reset_last_branch_rb(tidq);
> +
>         return err;
>  }
>
> --
> 2.17.1
>

Reviewed by: Mike Leach <mike.leach@linaro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK