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Subject: Re: [PATCH v2 11/12] dt-bindings: arm: Document Broadcom SoCs
 'secondary-boot-reg'
To:     Maxime Ripard <maxime@cerno.tech>,
        Florian Fainelli <f.fainelli@gmail.com>
Cc:     linux-arm-kernel@lists.infradead.org,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Ray Jui <rjui@broadcom.com>,
        Scott Branden <sbranden@broadcom.com>,
        "maintainer:BROADCOM IPROC ARM ARCHITECTURE" 
        <bcm-kernel-feedback-list@broadcom.com>,
        Nicolas Saenz Julienne <nsaenzjulienne@suse.de>,
        Sugaya Taichi <sugaya.taichi@socionext.com>,
        Andrew Jeffery <andrew@aj.id.au>,
        Arnd Bergmann <arnd@arndb.de>, Joel Stanley <joel@jms.id.au>,
        Vinod Koul <vkoul@kernel.org>,
        "james.tai" <james.tai@realtek.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>,
        "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" 
        <linux-rpi-kernel@lists.infradead.org>
References: <20200204235552.7466-1-f.fainelli@gmail.com>
 <20200204235552.7466-12-f.fainelli@gmail.com>
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From:   Florian Fainelli <f.fainelli@gmail.com>
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Message-ID: <ec3d1bca-323c-d3fc-ea0e-75335b4b92dc@gmail.com>
Date:   Wed, 5 Feb 2020 09:48:19 -0800
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On 2/4/20 11:49 PM, Maxime Ripard wrote:
> On Tue, Feb 04, 2020 at 03:55:51PM -0800, Florian Fainelli wrote:
>> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml
>> index c23c24ff7575..d7b181a44789 100644
>> --- a/Documentation/devicetree/bindings/arm/cpus.yaml
>> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml
>> @@ -272,6 +272,39 @@ properties:
>>        While optional, it is the preferred way to get access to
>>        the cpu-core power-domains.
>>
>> +  secondary-boot-reg:
>> +    $ref: '/schemas/types.yaml#/definitions/uint32'
>> +    description: |
>> +      Required for systems that have an "enable-method" property value of
>> +      "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".
>> +
>> +      This includes the following SoCs: |
>> +      BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550
>> +      BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
>> +
>> +      The secondary-boot-reg property is a u32 value that specifies the
>> +      physical address of the register used to request the ROM holding pen
>> +      code release a secondary CPU. The value written to the register is
>> +      formed by encoding the target CPU id into the low bits of the
>> +      physical start address it should jump to.
>> +
>> +if:
>> +  # If the enable-method property contains one of those values
>> +  properties:
>> +    enable-method:
>> +      contains:
>> +        enum:
>> +          - brcm,bcm11351-cpu-method
>> +          - brcm,bcm23550
>> +          - brcm,bcm-nsp-smp
>> +  # and if enable-method is present
> 
> Those comments were purely for the explanation, but you can keep them
> I guess :)
> 
> Regardless on whether or not you keep them, for the whole series
> Acked-by: Maxime Ripard <mripard@kernel.org>

You could almost have Signed-off-by on this one, thanks a lot for
walking me through examples.
-- 
Florian