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[209.132.180.67]) by mx.google.com with ESMTP id j3si807144oie.86.2020.02.05.13.02.28; Wed, 05 Feb 2020 13:02:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b="Rk/4htUg"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727456AbgBEVAy (ORCPT + 99 others); Wed, 5 Feb 2020 16:00:54 -0500 Received: from mail-pl1-f196.google.com ([209.85.214.196]:34633 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726534AbgBEVAx (ORCPT ); Wed, 5 Feb 2020 16:00:53 -0500 Received: by mail-pl1-f196.google.com with SMTP id j7so1385607plt.1 for ; Wed, 05 Feb 2020 13:00:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FUGJOQA/XPlyuySkAAgNK3zA/dvFfs1541m7bWXWJX0=; b=Rk/4htUgW3pmgjFB9ILRI8UuawaCIN2Zo3cTHx5+0uAW5RP8x+WxIEXjtiTee3FHpl 4QPdPahaQa/uN9vGMcc831PL8bHyH4Cr4CIpslXssqUojJqJM87rJFWikZqwrpRKJSeh h4x9NC//1DoXOsryYbyfEfcgXeBUPZI/cOxcE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FUGJOQA/XPlyuySkAAgNK3zA/dvFfs1541m7bWXWJX0=; b=U/ITjAOc0qgFo01Dv/XU3d9/0V4J8JUAIK+QQFc4/SAx2uKdRQJ06nowMU1y/d+1Eu wLMeSdeIi3645q+Voq2fippiW65P3OWJDs5kxvNbl6EKETmZcp9zkekSMzyIUBDd+cZ5 MlsMwuK+1mdjTUQ9WiHcG3y8D87neFKVZlW2Ek7eh9+gZgb87DmAw3khu0nrnQ2HVlTr SE2Q7+Daq4BhXt0f8C90bCCLb+WmNTjekNA4Z0f2w62fdFJRQEqdGKSjUDZM54eeKy8P e2UR9zkeUiqcXRJ6P+T9XRP0L9Z2mYcmVgOkjjWSxhqum7iuPrIIahfCJkRSafLHIzcR ms5g== X-Gm-Message-State: APjAAAU5TD4NG7acQBdNOOOYrl2pYCEGgISeuju6GPLq2up1+6jFQV7z iqes/1mJQueIghKqeUdYdpokMOc/eQ4= X-Received: by 2002:a17:90a:3745:: with SMTP id u63mr33357pjb.123.1580936452186; Wed, 05 Feb 2020 13:00:52 -0800 (PST) Received: from pmalani2.mtv.corp.google.com ([2620:15c:202:201:172e:4646:c089:ce59]) by smtp.gmail.com with ESMTPSA id f8sm648797pjg.28.2020.02.05.13.00.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Feb 2020 13:00:51 -0800 (PST) From: Prashant Malani To: linux-kernel@vger.kernel.org Cc: heikki.krogerus@intel.com, enric.balletbo@collabora.com, bleung@chromium.org, Prashant Malani , Guenter Roeck Subject: [PATCH 1/3] platform/chrome: Add Type C connector class driver Date: Wed, 5 Feb 2020 12:59:50 -0800 Message-Id: <20200205205954.84503-2-pmalani@chromium.org> X-Mailer: git-send-email 2.25.0.341.g760bfbb309-goog In-Reply-To: <20200205205954.84503-1-pmalani@chromium.org> References: <20200205205954.84503-1-pmalani@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a driver to implement the Type C connector class for Chrome OS devices with ECs (Embedded Controllers). The driver relies on firmware device specifications for various port attributes. On ACPI platforms, this is specified using the logical device with HID GOOG0014. On DT platforms, this is specified using the DT node with compatible string "google,cros-ec-typec". This patch reads the device FW node and uses the port attributes to register the typec ports with the Type C connector class framework, but doesn't do much else. Subsequent patches will add more functionality to the driver, including obtaining current port information (polarity, vconn role, current power role etc.) after querying the EC. Signed-off-by: Prashant Malani --- drivers/platform/chrome/Kconfig | 11 ++ drivers/platform/chrome/Makefile | 1 + drivers/platform/chrome/cros_ec_typec.c | 228 ++++++++++++++++++++++++ 3 files changed, 240 insertions(+) create mode 100644 drivers/platform/chrome/cros_ec_typec.c diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index 5f57282a28da00..1370dfd1ca1565 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -214,6 +214,17 @@ config CROS_EC_SYSFS To compile this driver as a module, choose M here: the module will be called cros_ec_sysfs. +config CROS_EC_TYPEC + tristate "ChromeOS EC Type-C Connector Control" + depends on MFD_CROS_EC_DEV && TYPEC + default n + help + If you say Y here, you get support for accessing Type C connector + information from the Chrome OS EC. + + To compile this driver as a module, choose M here: the module will be + called cros_ec_typec. + config CROS_USBPD_LOGGER tristate "Logging driver for USB PD charger" depends on CHARGER_CROS_USBPD diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index aacd5920d8a180..caf2a9cdb5e6d1 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_CROS_EC_ISHTP) += cros_ec_ishtp.o obj-$(CONFIG_CROS_EC_RPMSG) += cros_ec_rpmsg.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_mec.o +obj-$(CONFIG_CROS_EC_TYPEC) += cros_ec_typec.o obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o obj-$(CONFIG_CROS_EC_PROTO) += cros_ec_proto.o cros_ec_trace.o obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT) += cros_kbd_led_backlight.o diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c new file mode 100644 index 00000000000000..fe5659171c2a85 --- /dev/null +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -0,0 +1,228 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright 2020 Google LLC + * + * This driver provides the ability to view and manage Type C ports through the + * Chrome OS EC. + */ + +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "cros-ec-typec" + +/* Platform-specific data for the Chrome OS EC Type C controller. */ +struct cros_typec_data { + struct device *dev; + struct cros_ec_device *ec; + int num_ports; + /* Array of ports, indexed by port number. */ + struct typec_port *ports[EC_USB_PD_MAX_PORTS]; +}; + +int cros_typec_parse_port_props(struct typec_capability *cap, + struct fwnode_handle *fwnode, + struct device *dev) +{ + const char *buf; + int ret; + + memset(cap, 0, sizeof(*cap)); + ret = fwnode_property_read_string(fwnode, "power-role", &buf); + if (ret) { + dev_err(dev, "power-role not found: %d\n", ret); + return ret; + } + + ret = typec_find_port_power_role(buf); + if (ret < 0) + return ret; + cap->type = ret; + + ret = fwnode_property_read_string(fwnode, "data-role", &buf); + if (ret) { + dev_err(dev, "data-role not found: %d\n", ret); + return ret; + } + + ret = typec_find_port_data_role(buf); + if (ret < 0) + return ret; + cap->data = ret; + + ret = fwnode_property_read_string(fwnode, "try-power-role", &buf); + if (ret) { + dev_err(dev, "try-power-role not found: %d\n", ret); + return ret; + } + + ret = typec_find_power_role(buf); + if (ret < 0) + return ret; + cap->prefer_role = ret; + + cap->fwnode = fwnode; + + return 0; +} + +static int cros_typec_init_ports(struct cros_typec_data *typec) +{ + struct device *dev = typec->dev; + struct typec_capability cap; + struct fwnode_handle *fwnode; + int ret; + int i; + int nports; + u32 port_num; + + nports = device_get_child_node_count(dev); + if (nports == 0) { + dev_err(dev, "No port entries found.\n"); + return -ENODEV; + } + + device_for_each_child_node(dev, fwnode) { + if (fwnode_property_read_u32(fwnode, "port-number", + &port_num)) { + dev_err(dev, "No port-number for port, skipping.\n"); + ret = -EINVAL; + goto unregister_ports; + } + + if (port_num >= typec->num_ports) { + dev_err(dev, "Invalid port number.\n"); + ret = -EINVAL; + goto unregister_ports; + } + + dev_dbg(dev, "Registering port %d\n", port_num); + ret = cros_typec_parse_port_props(&cap, fwnode, dev); + if (ret < 0) + goto unregister_ports; + typec->ports[port_num] = typec_register_port(dev, &cap); + if (IS_ERR(typec->ports[port_num])) { + dev_err(dev, "Failed to register port %d\n", port_num); + ret = PTR_ERR(typec->ports[port_num]); + goto unregister_ports; + } + } + + return 0; + +unregister_ports: + for (i = 0; i < typec->num_ports; i++) + typec_unregister_port(typec->ports[i]); + return ret; +} + +static int cros_typec_ec_command(struct cros_typec_data *typec, + unsigned int version, + unsigned int command, + void *outdata, + unsigned int outsize, + void *indata, + unsigned int insize) +{ + struct cros_ec_command *msg; + int ret; + + msg = kzalloc(sizeof(*msg) + max(outsize, insize), GFP_KERNEL); + if (!msg) + return -ENOMEM; + + msg->version = version; + msg->command = command; + msg->outsize = outsize; + msg->insize = insize; + + if (outsize) + memcpy(msg->data, outdata, outsize); + + ret = cros_ec_cmd_xfer_status(typec->ec, msg); + if (ret >= 0 && insize) + memcpy(indata, msg->data, insize); + + kfree(msg); + return ret; +} + + +static int cros_typec_get_num_ports(struct cros_typec_data *typec) +{ + struct ec_response_usb_pd_ports resp; + int ret; + + ret = cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_PORTS, NULL, 0, + &resp, sizeof(resp)); + if (ret < 0) + return ret; + + typec->num_ports = resp.num_ports; + if (typec->num_ports > EC_USB_PD_MAX_PORTS) { + dev_warn(typec->dev, + "Too many ports reported: %d, limiting to max: %d\n", + typec->num_ports, EC_USB_PD_MAX_PORTS); + } + + return 0; +} + +#ifdef CONFIG_ACPI +static const struct acpi_device_id cros_typec_acpi_id[] = { + { "GOOG0014", 0 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(acpi, cros_typec_acpi_id); +#endif + +#ifdef CONFIG_OF +static const struct of_device_id cros_typec_of_match[] = { + { .compatible = "google,cros-ec-typec", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, cros_typec_of_match); +#endif + +static int cros_typec_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cros_typec_data *typec; + int ret; + + typec = devm_kzalloc(dev, sizeof(*typec), GFP_KERNEL); + if (!typec) + return -ENOMEM; + typec->dev = dev; + typec->ec = dev_get_drvdata(pdev->dev.parent); + platform_set_drvdata(pdev, typec); + + ret = cros_typec_get_num_ports(typec); + if (ret < 0) + return ret; + + ret = cros_typec_init_ports(typec); + if (!ret) + return ret; + + return 0; +} + +static struct platform_driver cros_typec_driver = { + .driver = { + .name = DRV_NAME, + .acpi_match_table = ACPI_PTR(cros_typec_acpi_id), + .of_match_table = of_match_ptr(cros_typec_of_match), + }, + .probe = cros_typec_probe, +}; + +module_platform_driver(cros_typec_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Chrome OS EC Type C control"); -- 2.25.0.341.g760bfbb309-goog