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From:   Avri Altman <Avri.Altman@wdc.com>
To:     Can Guo <cang@codeaurora.org>,
        "asutoshd@codeaurora.org" <asutoshd@codeaurora.org>,
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        "rnayak@codeaurora.org" <rnayak@codeaurora.org>,
        "linux-scsi@vger.kernel.org" <linux-scsi@vger.kernel.org>,
        "kernel-team@android.com" <kernel-team@android.com>,
        "saravanak@google.com" <saravanak@google.com>,
        "salyzyn@google.com" <salyzyn@google.com>
CC:     Alim Akhtar <alim.akhtar@samsung.com>,
        "James E.J. Bottomley" <jejb@linux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@oracle.com>,
        Bean Huo <beanhuo@micron.com>,
        Stanley Chu <stanley.chu@mediatek.com>,
        Colin Ian King <colin.king@canonical.com>,
        Tomas Winkler <tomas.winkler@intel.com>,
        Bart Van Assche <bvanassche@acm.org>,
        Venkat Gopalakrishnan <venkatg@codeaurora.org>,
        open list <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 6/8] scsi: ufs: Add dev ref clock gating wait time support
Thread-Topic: [PATCH 6/8] scsi: ufs: Add dev ref clock gating wait time
 support
Thread-Index: AQHV3LrFqYJc4q2xTEa994hLDBcv/qgNzFHg
Date:   Thu, 6 Feb 2020 07:57:19 +0000
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> In UFS version 3.0, a newly added attribute bRefClkGatingWaitTime defines
> the minimum time for which the reference clock is required by device duri=
ng
> transition to LS-MODE or HIBERN8 state. Make this change to reflect the n=
ew
> requirement by adding delays before turning off the clock.
>=20
> Signed-off-by: Can Guo <cang@codeaurora.org>
> Reviewed-by: Asutosh Das <asutoshd@codeaurora.org>
> Reviewed-by: Bean Huo <beanhuo@micron.com>
>=20
> diff --git a/drivers/scsi/ufs/ufs.h b/drivers/scsi/ufs/ufs.h
> index cfe3803..990cb48 100644
> --- a/drivers/scsi/ufs/ufs.h
> +++ b/drivers/scsi/ufs/ufs.h
> @@ -167,6 +167,7 @@ enum attr_idn {
>         QUERY_ATTR_IDN_FFU_STATUS               =3D 0x14,
>         QUERY_ATTR_IDN_PSA_STATE                =3D 0x15,
>         QUERY_ATTR_IDN_PSA_DATA_SIZE            =3D 0x16,
> +       QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME =3D 0x17,
>  };
>=20
>  /* Descriptor idn for Query requests */
> @@ -534,6 +535,8 @@ struct ufs_dev_info {
>         u16 wmanufacturerid;
>         /*UFS device Product Name */
>         u8 *model;
> +       u16 wspecversion;
> +       u32 clk_gating_wait_us;
>  };
>=20
>  /**
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index e8f7f9d..76beaf9 100644
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -91,6 +91,9 @@
>  /* default delay of autosuspend: 2000 ms */
>  #define RPM_AUTOSUSPEND_DELAY_MS 2000
>=20
> +/* Default value of wait time before gating device ref clock */
> +#define UFSHCD_REF_CLK_GATING_WAIT_US 0xFF /* microsecs */
> +
>  #define ufshcd_toggle_vreg(_dev, _vreg, _on)                           \
>         ({                                                              \
>                 int _ret;                                               \
> @@ -3281,6 +3284,29 @@ static inline int
> ufshcd_read_unit_desc_param(struct ufs_hba *hba,
>                                       param_offset, param_read_buf, param=
_size);
>  }
>=20
> +static int ufshcd_get_ref_clk_gating_wait(struct ufs_hba *hba)
> +{
> +       int err =3D 0;
> +       u32 gating_wait =3D UFSHCD_REF_CLK_GATING_WAIT_US;
> +
> +       if (hba->dev_info.wspecversion >=3D 0x300) {
> +               err =3D ufshcd_query_attr_retry(hba,
> UPIU_QUERY_OPCODE_READ_ATTR,
> +                               QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME, =
0, 0,
> +                               &gating_wait);
> +               if (err)
> +                       dev_err(hba->dev, "Failed reading bRefClkGatingWa=
it. err =3D
> %d, use default %uus\n",
> +                                        err, gating_wait);
> +
> +               if (gating_wait =3D=3D 0) {
> +                       gating_wait =3D UFSHCD_REF_CLK_GATING_WAIT_US;
> +                       dev_err(hba->dev, "Undefined ref clk gating wait =
time, use
> default %uus\n",
> +                                        gating_wait);
> +               }

You forgot to set
hba->dev_info.clk_gating_wait_us =3D gating_wait

Thanks,
Avri