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[209.132.180.67]) by mx.google.com with ESMTP id n20si1816322oig.53.2020.02.06.03.15.45; Thu, 06 Feb 2020 03:15:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=EJF3o1zT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728464AbgBFKjF (ORCPT + 99 others); Thu, 6 Feb 2020 05:39:05 -0500 Received: from mail.kernel.org ([198.145.29.99]:45352 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728035AbgBFKjE (ORCPT ); Thu, 6 Feb 2020 05:39:04 -0500 Received: from willie-the-truck (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B697D20730; Thu, 6 Feb 2020 10:39:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580985544; bh=gtIwWtw5fbPPavML5kQUyoCRGV2WDAlOHO8LMQiUGG0=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=EJF3o1zTd/N4TtE8/XCkOytSP31/QOn96mQWqN1WNfwe0csOLIhqBtuHWzXs3gubA tiTMnmqwF9IGwzVNao1obmoHdhpoq86vlHgfv88G1kExMw68NW3PCJjwIauMr/X08D xxc8XMjoncKl1o+K47yseG5Qp2Mwf9iF3BAJU/C0= Date: Thu, 6 Feb 2020 10:38:59 +0000 From: Will Deacon To: Bhupesh Sharma Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com, Mark Rutland , Catalin Marinas , Ard Biesheuvel Subject: Re: [PATCH 2/2] perf/arm64: Allow per-task kernel breakpoints Message-ID: <20200206103858.GB17074@willie-the-truck> References: <1580768784-25868-1-git-send-email-bhsharma@redhat.com> <1580768784-25868-3-git-send-email-bhsharma@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1580768784-25868-3-git-send-email-bhsharma@redhat.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 04, 2020 at 03:56:24AM +0530, Bhupesh Sharma wrote: > commit 478fcb2cdb23 ("arm64: Debugging support") disallowed per-task > kernel breakpoints on arm64 since these would have potentially > complicated the stepping code. > > However, we now have several use-cases (for e.g. perf) which require > per-task address execution h/w breakpoint to be exercised/set on arm64: To be honest, the perf interface to hw_breakpoint is an abomination and I think we should remove it entirely for arm64. It's flakey, complicated, adds code to context-switch and reduces the capabilities available to ptrace. > For e.g. we can set address execution h/w breakpoints, using the > format prescribed by 'perf-list' command: > mem:[/len][:access] [Hardware breakpoint] > > Without this patch, currently 'perf stat -e' reports that per-task > address execution h/w breakpoints are 'not supported' on arm64. See > below: > > $ TEST_FUNC="vfs_read" > $ ADDR=0x`cat /proc/kallsyms | grep -P "\\s$TEST_FUNC\$" | cut -f1 -d' '` > $ perf stat -e mem:$ADDR:x -x';' -- cat /proc/cpuinfo > /dev/null > > ;;mem:0xffff00001031dd68:x;0;100.00;; > > After this patch, this use-case can be supported: > > $ TEST_FUNC="vfs_read" > $ ADDR=0x`cat /proc/kallsyms | grep -P "\\s$TEST_FUNC\$" | cut -f1 -d' '` > $ perf stat -e mem:$ADDR:x -x';' -- cat /proc/cpuinfo > /dev/null > > 5;;mem:0xfffffe0010361d20:x;912200;100.00;; > > Cc: Mark Rutland > Cc: Will Deacon > Cc: Catalin Marinas > Cc: Ard Biesheuvel > Signed-off-by: Bhupesh Sharma > --- > arch/arm64/kernel/hw_breakpoint.c | 7 ------- > 1 file changed, 7 deletions(-) > > diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c > index 0b727edf4104..c28f04e02845 100644 > --- a/arch/arm64/kernel/hw_breakpoint.c > +++ b/arch/arm64/kernel/hw_breakpoint.c > @@ -562,13 +562,6 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, > hw->address &= ~alignment_mask; > hw->ctrl.len <<= offset; > > - /* > - * Disallow per-task kernel breakpoints since these would > - * complicate the stepping code. > - */ > - if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) > - return -EINVAL; > - Sorry, but this is broken; the check is there for a reason, not just for fun! Look at how the step handler toggles the bp registers. Will