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From:   Oded Gabbay <oded.gabbay@gmail.com>
Date:   Fri, 7 Feb 2020 09:05:24 +0200
Message-ID: <CAFCwf12GYEcAHpundrSq9SQsiJEaM40s_4kF=mNGXFf0gKBOJg@mail.gmail.com>
Subject: Re: [PATCH] habanalabs: fix DDR bar address setting
To:     Omer Shpigelman <oshpigelman@habana.ai>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
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On Thu, Feb 6, 2020 at 1:16 PM Omer Shpigelman <oshpigelman@habana.ai> wrote:
>
> DRAM_PHYS_BASE is already taken into account in MMU_PAGE_TABLES_ADDR.
>
> Signed-off-by: Omer Shpigelman <oshpigelman@habana.ai>
> ---
>  drivers/misc/habanalabs/goya/goya.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
> index 74785ccd2cb1..f634e9c5cad9 100644
> --- a/drivers/misc/habanalabs/goya/goya.c
> +++ b/drivers/misc/habanalabs/goya/goya.c
> @@ -2575,8 +2575,7 @@ static int goya_hw_init(struct hl_device *hdev)
>          * After CPU initialization is finished, change DDR bar mapping inside
>          * iATU to point to the start address of the MMU page tables
>          */
> -       if (goya_set_ddr_bar_base(hdev, DRAM_PHYS_BASE +
> -                       (MMU_PAGE_TABLES_ADDR &
> +       if (goya_set_ddr_bar_base(hdev, (MMU_PAGE_TABLES_ADDR &
>                         ~(prop->dram_pci_bar_size - 0x1ull))) == U64_MAX) {
>                 dev_err(hdev->dev,
>                         "failed to map DDR bar to MMU page tables\n");
> --
> 2.17.1
>

This patch is:
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>