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From:   Arnd Bergmann <arnd@arndb.de>
Date:   Mon, 10 Feb 2020 17:35:19 +0100
Message-ID: <CAK8P3a3HsdpLz0aDGem1BrQsNo2mEJOnOsLcKFcLjaERx9dhGg@mail.gmail.com>
Subject: Re: [PATCH v6 06/12] soc: aspeed: Add XDMA Engine Driver
To:     Eddie James <eajames@linux.ibm.com>
Cc:     linux-aspeed <linux-aspeed@lists.ozlabs.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        DTML <devicetree@vger.kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Jason Cooper <jason@lakedaemon.net>,
        Marc Zyngier <maz@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>
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On Wed, Jan 15, 2020 at 10:31 PM Eddie James <eajames@linux.ibm.com> wrote:
>
> The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
> DMA operations between the SOC (acting as a BMC) and a host processor
> in a server.
>
> This commit adds a driver to control the XDMA engine and adds functions
> to initialize the hardware and memory and start DMA operations.
>
> Signed-off-by: Eddie James <eajames@linux.ibm.com>

Hi Eddie,

I'm missing the bigger picture in the description here, how does this fit into
the PCIe endpoint framework and the dmaengine subsystem?

Does the AST2500 show up as a PCIe device in the host, or do you just
inject DMAs into the host and hope that bypasses the IOMMU?
If it shows up as an endpoint, how does the endpoint driver link into the
dma driver?

     Arnd