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[209.132.180.67]) by mx.google.com with ESMTP id j12si2493762otk.276.2020.02.11.13.32.20; Tue, 11 Feb 2020 13:32:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730143AbgBKSIh (ORCPT + 99 others); Tue, 11 Feb 2020 13:08:37 -0500 Received: from mga02.intel.com ([134.134.136.20]:56663 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728832AbgBKSIh (ORCPT ); Tue, 11 Feb 2020 13:08:37 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Feb 2020 10:08:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="222014389" Received: from mahaling-mobl.amr.corp.intel.com (HELO [10.254.185.201]) ([10.254.185.201]) by orsmga007.jf.intel.com with ESMTP; 11 Feb 2020 10:08:34 -0800 Subject: Re: [alsa-devel] [PATCH] ASoC: da7219: check SRM lock in trigger callback To: "Lu, Brent" , Adam Thomson , "alsa-devel@alsa-project.org" Cc: Support Opensource , Liam Girdwood , Takashi Iwai , "linux-kernel@vger.kernel.org" , "Chiang, Mac" , Mark Brown , "cychiang@google.com" , Ranjani Sridharan References: <1581322611-25695-1-git-send-email-brent.lu@intel.com> From: Pierre-Louis Bossart Message-ID: <855c88fb-4438-aefb-ac9b-a9a5a2dc8caa@linux.intel.com> Date: Tue, 11 Feb 2020 10:30:35 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >> Could ensure? This change seems specific to Intel DSP based systems, at >> least from the description. Having looked through the core, the trigger code >> for a codec is seemingly always called before the trigger for the CPU. How will >> this work for other platforms, assuming their clocks are enabled in the CPU >> DAI trigger function by default? >> >> Can we always guarantee the CPU side isn't going to send anything other >> than 0s until after SRM has locked? Not with the default mode for the SSP, all clocks are enabled at trigger time. We can enable the MCLK and BCLK ahead of time (which would require a change in firmware). But if we want to enable the FSYNC (word-clock), then we have to trigger DMA transfers with pretend-buffers, this is a lot more invasive. So just to be clear, which of the MCLK, BCLK, FSYNC do you need enabled? > I think the patch is for those systems which enable I2S clocks in pcm_start instead > of pcm_prepare. It has no effect on systems already be able to turn on clocks in > supply widgets or set_bias_level() function. > > If the trigger type in the DAI link is TRIGGER_PRE, then the trigger function of FE port > (component or CPU DAI) will be called before codec driver's trigger function. In this > case we will be able to turn on the clock in time. However, if the trigger type is > TRIGGER_POST, then the patch does not help because just like what you said, codec > driver's trigger function is called first. IIRC we recently did a change to deal with underflows. Ranjani, can you remind us what the issue was? Thanks -Pierre