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Date:   Wed, 12 Feb 2020 18:19:42 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Tim Harvey <tharvey@gateworks.com>
Cc:     netdev <netdev@vger.kernel.org>,
        open list <linux-kernel@vger.kernel.org>, rrichter@marvell.com,
        linux-arm-kernel@lists.infradead.org,
        David Miller <davem@davemloft.net>, sgoutham@marvell.com
Subject: Re: [PATCH] net: thunderx: use proper interface type for RGMII
Message-ID: <20200212171942.GR19213@lunn.ch>
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 <CAJ+vNU0LV7EquWXfBKfYYLzagXiVHtvqMtx5hiM1zxXQWVgWrA@mail.gmail.com>
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On Wed, Feb 12, 2020 at 08:55:39AM -0800, Tim Harvey wrote:
> On Fri, Feb 7, 2020 at 1:02 PM Andrew Lunn <andrew@lunn.ch> wrote:
> >
> > On Fri, Feb 07, 2020 at 12:40:26PM -0800, Tim Harvey wrote:
> > > The configuration of the OCTEONTX XCV_DLL_CTL register via
> > > xcv_init_hw() is such that the RGMII RX delay is bypassed
> > > leaving the RGMII TX delay enabled in the MAC:
> > >
> > >       /* Configure DLL - enable or bypass
> > >        * TX no bypass, RX bypass
> > >        */
> > >       cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL);
> > >       cfg &= ~0xFF03;
> > >       cfg |= CLKRX_BYP;
> > >       writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL);
> > >
> > > This would coorespond to a interface type of PHY_INTERFACE_MODE_RGMII_RXID
> > > and not PHY_INTERFACE_MODE_RGMII.
> > >
> > > Fixing this allows RGMII PHY drivers to do the right thing (enable
> > > RX delay in the PHY) instead of erroneously enabling both delays in the
> > > PHY.
> >
> > Hi Tim
> >
> > This seems correct. But how has it worked in the past? Does this
> > suggest there is PHY driver out there which is doing the wrong thing
> > when passed PHY_INTERFACE_MODE_RGMII?
> >
> > Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> >
> 
> Andrew,
> 
> Yes, the DP83867 phy driver used on the Gateworks Newport boards would
> configure the delay in an incompatible way when enabled.

Hi Tim

So it was broken? Maybe find the appropriate Fixes tag, and have David
add it to stable?

    Andrew