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[209.132.180.67]) by mx.google.com with ESMTP id j1si470335otr.207.2020.02.12.09.25.53; Wed, 12 Feb 2020 09:26:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=mLVtOPey; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727680AbgBLRYx (ORCPT + 99 others); Wed, 12 Feb 2020 12:24:53 -0500 Received: from mail-ua1-f67.google.com ([209.85.222.67]:34767 "EHLO mail-ua1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726728AbgBLRYx (ORCPT ); Wed, 12 Feb 2020 12:24:53 -0500 Received: by mail-ua1-f67.google.com with SMTP id 1so1178964uao.1; Wed, 12 Feb 2020 09:24:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=jCGxfylxy3MldAt/reEr7p2HcESXZ2SEVCL7ze7sb8M=; b=mLVtOPeyTrlGTAOEBO32ZUHoFId8CdOxxgdZYat1MHSCbZKEoRcEDicBnpT71GntOI jE9GscwR8WoZBDG3NW2w5NV4KY4Y8KfFRmaVsjrpAkVgBIy1+dNvlJV4eDDZDPfUqKVK oorEhZlJcQWCPlGU6yTKKyzkjd8lVDC09X8BRQFifOVlbdeW8BUCX8oUY+gdFrqV43ve A7HVKdPyoFHMCkXVqFcQSKxCEkspuET12AzZarmTfBeGT1hUgL0I2kOfIADygzgcXX0I HilyTVF18ofv8eL17GJwyyCw6bLnd7ieFA+NvVspb+P0wA90z7swiFmFjYi2DXaQkKOH 2Y2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=jCGxfylxy3MldAt/reEr7p2HcESXZ2SEVCL7ze7sb8M=; b=KBcoofSdsZBPCXwqDwvfsx2OFZGhpGqfvSjS/0luzx4qe9h1NLHCPGcQnMzMEt1Vsd mncszrkchSVB50iY1p2OqxoRKF49UPqyWwI4l01wB9sk5cv/hh5DDftqr5jBPvA4lelZ Fi1xLTcpSjWNP/SzESJyWQvMAVqIA4iNJJTomEPXW65es3jTVgR2Ll1Db9kT32y7V+EV NWV3YC6du45Cxnbta11CpkhKgrYQp4LDVeBeLNmKlyulkpEhowvyD7gVMvOhcQtXthg2 UbfI8h25izvycMHsBY6/hgivFTruUhKJVmJt8jQ4a7qfe0V+1vnXfS8jjT7pBVFrUYhM e3Xg== X-Gm-Message-State: APjAAAVerJ5jEi5PMl2rK8MVAROpjCnwvpD3isLjRhExSS0aO9f/MEMp aeViCftYeUNFpTc0O9y5sXLhkj5K/ZcYTSID99g= X-Received: by 2002:ab0:66d6:: with SMTP id d22mr5082237uaq.92.1581528292397; Wed, 12 Feb 2020 09:24:52 -0800 (PST) MIME-Version: 1.0 References: <1ae9af586a2003e23885ccc7ef58ee2b1dce29f7.1581475981.git.shengjiu.wang@nxp.com> In-Reply-To: <1ae9af586a2003e23885ccc7ef58ee2b1dce29f7.1581475981.git.shengjiu.wang@nxp.com> From: Fabio Estevam Date: Wed, 12 Feb 2020 14:24:40 -0300 Message-ID: Subject: Re: [PATCH 2/3] ASoC: dt-bindings: fsl_easrc: Add document for EASRC To: Shengjiu Wang Cc: Timur Tabi , Nicolin Chen , Xiubo Li , Mark Brown , Linux-ALSA , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , Rob Herring , Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linuxppc-dev@lists.ozlabs.org, linux-kernel Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 12, 2020 at 1:35 AM Shengjiu Wang wrote: > > EASRC (Enhanced Asynchronous Sample Rate Converter) is a new > IP module found on i.MX815. i.MX815 in an internal terminology. Please avoid it on the commit log. > > Signed-off-by: Shengjiu Wang > --- > .../devicetree/bindings/sound/fsl,easrc.txt | 57 +++++++++++++++++++ > 1 file changed, 57 insertions(+) > create mode 100644 Documentation/devicetree/bindings/sound/fsl,easrc.txt > > diff --git a/Documentation/devicetree/bindings/sound/fsl,easrc.txt b/Documentation/devicetree/bindings/sound/fsl,easrc.txt > new file mode 100644 > index 000000000000..0e8153165e3b > --- /dev/null > +++ b/Documentation/devicetree/bindings/sound/fsl,easrc.txt > @@ -0,0 +1,57 @@ > +NXP Asynchronous Sample Rate Converter (ASRC) Controller > + > +The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a > +signal associated with an input clock into a signal associated with a different > +output clock. The driver currently works as a Front End of DPCM with other Back > +Ends Audio controller such as ESAI, SSI and SAI. It has four context to support > +four substreams within totally 32 channels. > + > +Required properties: > +- compatible: Contains "fsl,imx8mn-easrc". > + > +- reg: Offset and length of the register set for the > + device. > + > +- interrupts: Contains the asrc interrupt. > + > +- dmas: Generic dma devicetree binding as described in > + Documentation/devicetree/bindings/dma/dma.txt. > + > +- dma-names: Contains "ctx0_rx", "ctx0_tx", > + "ctx1_rx", "ctx1_tx", > + "ctx2_rx", "ctx2_tx", > + "ctx3_rx", "ctx3_tx". > + > +- clocks: Contains an entry for each entry in clock-names. > + > +- clock-names: "mem" - Peripheral clock to driver module. > + > +- fsl,easrc-ram-script-name: The coefficient table for the filters > + > +- fsl,asrc-rate: Defines a mutual sample rate used by DPCM Back > + Ends. > + > +- fsl,asrc-width: Defines a mutual sample width used by DPCM Back > + Ends. > + > +Example: > + > +easrc: easrc@300C0000 { > + compatible = "fsl,imx8mn-easrc"; > + reg = <0x0 0x300C0000 0x0 0x10000>; > + interrupts = ; > + clocks = <&clk IMX8MN_CLK_ASRC_ROOT>; > + clock-names = "mem"; > + dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>, > + <&sdma2 18 23 0> , <&sdma2 19 23 0>, > + <&sdma2 20 23 0> , <&sdma2 21 23 0>, > + <&sdma2 22 23 0> , <&sdma2 23 23 0>; > + dma-names = "ctx0_rx", "ctx0_tx", > + "ctx1_rx", "ctx1_tx", > + "ctx2_rx", "ctx2_tx", > + "ctx3_rx", "ctx3_tx"; > + fsl,easrc-ram-script-name = "imx/easrc/easrc-imx8mn.bin"; > + fsl,asrc-rate = <8000>; > + fsl,asrc-width = <16>; > + status = "disabled"; > +}; > -- > 2.21.0 >