Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp6548889ybv; Wed, 12 Feb 2020 14:37:48 -0800 (PST) X-Google-Smtp-Source: APXvYqx79lhOj4Al3VwRtQ031UPOkBxN9wphLiQk9nBH/AHE/nusq9pZeq+b/RKMK9M1CGHdrCK4 X-Received: by 2002:aca:fcc1:: with SMTP id a184mr964715oii.36.1581547068846; Wed, 12 Feb 2020 14:37:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581547068; cv=none; d=google.com; s=arc-20160816; b=dBtMcmKKv9Asze4GZB3sqfgEf7h3TdELOMyV89WGzPO38ZZL75rEhlgDS0aHYEfzbh +Tns9E3UgwTiH686KWo45DEjkVbYXPTDyYphf/PTKnwYuNNKZ6nLujlgiuFUv5jP9qRC Yz7JNrw2DQMnPxubgf8Nj9yjSCWi+BwgkUV551V+rrEcORyhKdz4DYZcc2+9f5mCz8IU 0BUGjnOZfGcQ6unGAYKz69FcoKhh/Fhq5+z57WP5uQcIKrG+sxwvT77MLz3bbMiqlYwO s3yjqGVHhPG1+UEWyJ2X9WqnguZsV1uvT3Ekotd0fafa3VHM/zxFbKeSkCy6ZuoNRVev GH+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=RfgtQC+3mLiLIWJ40W3e3DYE0SbtnFe1YOnb86vxlVk=; b=sZJjAKXPhaA0f+WQDSTYsNoGnezQPX37Z2hPoR54P3DvSAh+8xhzHi9eK+oonB4S7I djYG7CXoAUb38E0dWXSX9+lpEkujp9ong+aMQN1wLpanpb+5s5zqK3dQxVRxku1eWXRU KGD51+crFMceCtfYUZQ60evGO9658XTDOTICT94EQvU11tUVQDs67XS0J2GTrMO9R0aC LtaYhJX302cPmPXEEl1vxXlWKYi/rW6SeHqdnVcE2SqSiaM6NhYu8oMDItWJWHuDrvmr J/fx2pMRriGk2ifTdIYiZcAOZLzuahydb+52CvjB03jOJvIG15rwgOTElSB1JJorTC7C 4M/Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p28si84773oth.296.2020.02.12.14.37.36; Wed, 12 Feb 2020 14:37:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729252AbgBLWg2 (ORCPT + 99 others); Wed, 12 Feb 2020 17:36:28 -0500 Received: from gloria.sntech.de ([185.11.138.130]:39280 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727947AbgBLWg1 (ORCPT ); Wed, 12 Feb 2020 17:36:27 -0500 Received: from p508fd8fe.dip0.t-ipconnect.de ([80.143.216.254] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1j20cF-0001ua-8B; Wed, 12 Feb 2020 23:36:19 +0100 From: Heiko Stuebner To: Justin Swartz Cc: Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks Date: Wed, 12 Feb 2020 23:36:18 +0100 Message-ID: <3638560.bLjz2vc75D@phil> In-Reply-To: <20200114162503.7548-1-justin.swartz@risingedge.co.za> References: <20200114162503.7548-1-justin.swartz@risingedge.co.za> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Justin, Am Dienstag, 14. Januar 2020, 17:25:02 CET schrieb Justin Swartz: > The following changes prevent the unrecoverable freezes and rcu_sched > stall warnings experienced in each of my attempts to take advantage of > lima. > > Replace the COMPOSITE_NOGATE definition of aclk_gpu_pre with a > COMPOSITE that retains the selection of HDMIPHY as the PLL source, but > instead makes uses of the aclk_gpu PLL source gate and parent names > defined by mux_pll_src_4plls_p rather than mux_aclk_gpu_pre_p. > > Remove the now unused mux_aclk_gpu_pre_p and the four named but also > unused definitions (cpll_gpu, gpll_gpu, hdmiphy_gpu and usb480m_gpu) > of the aclk_gpu PLL source gate. > > Use the correct gate offset for aclk_gpu and aclk_gpu_noc. > > Signed-off-by: Justin Swartz thanks a lot for diving through the clock controller and fixing the issues. I've checked against the TRM as well and the previous state was quite wrong and your changes match the hardware manual. I've applied it as fix for 5.6 now. Thanks Heiko