Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp557180ybv; Thu, 13 Feb 2020 05:37:37 -0800 (PST) X-Google-Smtp-Source: APXvYqwrA6AID1vS6YjNwTO3CGG9MPNF5msvk0jL0qMxDyPoa2//NUnoDeqEWKXoMojzUhGcGDF1 X-Received: by 2002:a9d:1c9c:: with SMTP id l28mr13112433ota.210.1581601056953; Thu, 13 Feb 2020 05:37:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581601056; cv=none; d=google.com; s=arc-20160816; b=NR/YCj597xjyQEJq8RvC8w2fRT0KOXLH5Pfq93DeYJ+LMM3tJYLzij8+KJwKYtTuce twpN0ArQVS92qRRXw65XFEsKvHAfv+BsB1HhVPvdryVXAQLKxX1tQO8FXnf4Xg3w+y3V YYMm6A3OyqlaRPFhuAN1ChgvE/HvSlhUHgIjKrX6StkrNR5nAuwD92fttxT5bbpCoOk8 J7ft2PwMJ0pyYQ6Y6BH7xn3bUaWdCFrWlwlpq0PuAyRWXzJIRAMH4YT6V3p7PPjbBliQ 6fil4+k1GEdSxcGOwonLXUaFG0q2WoQvTkR+BpFcf9Hd/kObMiJCo4jHj31hKfs0wUtl BzWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=zkj4moyX3ExA3JZnxZnOdbwj7xLgfeduTVXJftss0No=; b=tSIHUfo2JtDZD7zHRBIvtcqpaHn22sVBml+7fxjjUy+n81+x5q19lCo9fel17/tzdy UDzb/dvT8uDTXUsk5VuiL8HcPqqJnIDODdZZxP+fvNNxadOM0S203mkWzWsVk27j8Wmw jag6Nvmn7unjE355/ncykT87B3dgUWGJtxnfK/mHKSGYBHk4snN7KZwqV8EDHWrl4cyU /VqNiwvpTHv9q83vXDLAYwBKcijWiOCbtxQdsEN356tztWvgb5/a8B+wT0hAB6eSnmKf +qcAQyCvPMNAllYl8qCU5P8877iRvy7DC2Re6N1kXPXjSQYaqXNC7pvfi2tJ0kspC2ik NlBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x4J7hsec; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 10si1128854ois.76.2020.02.13.05.37.23; Thu, 13 Feb 2020 05:37:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=x4J7hsec; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729971AbgBMNhR (ORCPT + 99 others); Thu, 13 Feb 2020 08:37:17 -0500 Received: from mail-qt1-f193.google.com ([209.85.160.193]:40192 "EHLO mail-qt1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729588AbgBMNhR (ORCPT ); Thu, 13 Feb 2020 08:37:17 -0500 Received: by mail-qt1-f193.google.com with SMTP id v25so4354150qto.7 for ; Thu, 13 Feb 2020 05:37:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=zkj4moyX3ExA3JZnxZnOdbwj7xLgfeduTVXJftss0No=; b=x4J7hsecZfskbx0MFkIaB+6D6tiFH482/wL2zMh8ETKzSXF1k3y6G43jc62Ex+EdMX 0AaYUJ396uMAwEkihImcXRqU3RG1LmfW6JuZlN7AkSULnOw+0kpbHoeF0fcsxzdSui5M AZ3MW6H424BuVxAMVWMrhZh5rFpqghNFQbA/cXXy8MwAqtAyIxzlXLHO7iVnj3ADbQjr 1bp8I/1leZb3WLPl5jrZ5ig8WUbvVti741NfMoGq7kdx1Eap2Smq4u8OOru6eqNXFEQJ d5S7RED7ykupKEdUuCqObzw2e4PJFmBSqR4kkpEc8u2u6jpvM1uERKv9AVV7zM3DNGGm fWYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=zkj4moyX3ExA3JZnxZnOdbwj7xLgfeduTVXJftss0No=; b=Ae2Sh9qXc7ccZUTKIFgzu4QkFydckBviBF6D/4yBMp4VQGvJAhdyVNHb4EYYaIMLm0 7TC9uYADJJBsHHUY5J4kMWqrtl14Uber4SL16jUi9a+9inpkjX72jzvOnZNcutGjn03H ypb5mDl9z1MikUGqHRhfFJeT8z1P97Ok+ZE3qxeIOrU+T3OuXPFbdvQxVDu0zHLIGDDK +a8zaUuNvPN5aS3tC9I/nDRWviSM1N63TIY4FjQhOtsTIbuZ10jN3ONFoW/E8Qab+We7 f82iDRlWlRh/mxfEq/UpolwUS2LKdQ22kiZpvQbtBmQyo62QvaYElMXgpIO2Z+8wNP2E LAGw== X-Gm-Message-State: APjAAAXszJSfjX9ESRkngY4touqCPNIB6sJaZz+U6SmtYLfKVqPmGEyh S5eghfjHTccLUwKwIpo+MdyuLTDNXz7zvsUFMdpa3A== X-Received: by 2002:aed:3786:: with SMTP id j6mr24680000qtb.62.1581601035887; Thu, 13 Feb 2020 05:37:15 -0800 (PST) MIME-Version: 1.0 References: <20200213094204.2568-1-leo.yan@linaro.org> <20200213094204.2568-4-leo.yan@linaro.org> In-Reply-To: <20200213094204.2568-4-leo.yan@linaro.org> From: Mike Leach Date: Thu, 13 Feb 2020 13:37:05 +0000 Message-ID: Subject: Re: [PATCH v4 3/5] perf cs-etm: Correct synthesizing instruction samples To: Leo Yan Cc: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Robert Walker , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel , linux-kernel@vger.kernel.org, Coresight ML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reviewed by: Mike Leach On Thu, 13 Feb 2020 at 09:43, Leo Yan wrote: > > When 'etm->instructions_sample_period' is less than > 'tidq->period_instructions', the function cs_etm__sample() cannot handle > this case properly with its logic. > > Let's see below flow as an example: > > - If we set itrace option '--itrace=i4', then function cs_etm__sample() > has variables with initialized values: > > tidq->period_instructions = 0 > etm->instructions_sample_period = 4 > > - When the first packet is coming: > > packet->instr_count = 10; the number of instructions executed in this > packet is 10, thus update period_instructions as below: > > tidq->period_instructions = 0 + 10 = 10 > instrs_over = 10 - 4 = 6 > offset = 10 - 6 - 1 = 3 > tidq->period_instructions = instrs_over = 6 > > - When the second packet is coming: > > packet->instr_count = 10; in the second pass, assume 10 instructions > in the trace sample again: > > tidq->period_instructions = 6 + 10 = 16 > instrs_over = 16 - 4 = 12 > offset = 10 - 12 - 1 = -3 -> the negative value > tidq->period_instructions = instrs_over = 12 > > So after handle these two packets, there have below issues: > > The first issue is that cs_etm__instr_addr() returns the address within > the current trace sample of the instruction related to offset, so the > offset is supposed to be always unsigned value. But in fact, function > cs_etm__sample() might calculate a negative offset value (in handling > the second packet, the offset is -3) and pass to cs_etm__instr_addr() > with u64 type with a big positive integer. > > The second issue is it only synthesizes 2 samples for sample period = 4. > In theory, every packet has 10 instructions so the two packets have > total 20 instructions, 20 instructions should generate 5 samples > (4 x 5 = 20). This is because cs_etm__sample() only calls once > cs_etm__synth_instruction_sample() to generate instruction sample per > range packet. > > This patch fixes the logic in function cs_etm__sample(); the basic > idea for handling coming packet is: > > - To synthesize the first instruction sample, it combines the left > instructions from the previous packet and the head of the new > packet; then generate continuous samples with sample period; > - At the tail of the new packet, if it has the rest instructions, > these instructions will be left for the sequential sample. > > Suggested-by: Mike Leach > Signed-off-by: Leo Yan > --- > tools/perf/util/cs-etm.c | 87 ++++++++++++++++++++++++++++++++-------- > 1 file changed, 70 insertions(+), 17 deletions(-) > > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > index b2f31390126a..4b7d6c36ce3c 100644 > --- a/tools/perf/util/cs-etm.c > +++ b/tools/perf/util/cs-etm.c > @@ -1356,9 +1356,12 @@ static int cs_etm__sample(struct cs_etm_queue *etmq, > struct cs_etm_auxtrace *etm = etmq->etm; > int ret; > u8 trace_chan_id = tidq->trace_chan_id; > - u64 instrs_executed = tidq->packet->instr_count; > + u64 instrs_prev; > > - tidq->period_instructions += instrs_executed; > + /* Get instructions remainder from previous packet */ > + instrs_prev = tidq->period_instructions; > + > + tidq->period_instructions += tidq->packet->instr_count; > > /* > * Record a branch when the last instruction in > @@ -1376,26 +1379,76 @@ static int cs_etm__sample(struct cs_etm_queue *etmq, > * TODO: allow period to be defined in cycles and clock time > */ > > - /* Get number of instructions executed after the sample point */ > - u64 instrs_over = tidq->period_instructions - > - etm->instructions_sample_period; > + /* > + * Below diagram demonstrates the instruction samples > + * generation flows: > + * > + * Instrs Instrs Instrs Instrs > + * Sample(n) Sample(n+1) Sample(n+2) Sample(n+3) > + * | | | | > + * V V V V > + * -------------------------------------------------- > + * ^ ^ > + * | | > + * Period Period > + * instructions(Pi) instructions(Pi') > + * > + * | | > + * \---------------- -----------------/ > + * V > + * tidq->packet->instr_count > + * > + * Instrs Sample(n...) are the synthesised samples occurring > + * every etm->instructions_sample_period instructions - as > + * defined on the perf command line. Sample(n) is being the > + * last sample before the current etm packet, n+1 to n+3 > + * samples are generated from the current etm packet. > + * > + * tidq->packet->instr_count represents the number of > + * instructions in the current etm packet. > + * > + * Period instructions (Pi) contains the the number of > + * instructions executed after the sample point(n) from the > + * previous etm packet. This will always be less than > + * etm->instructions_sample_period. > + * > + * When generate new samples, it combines with two parts > + * instructions, one is the tail of the old packet and another > + * is the head of the new coming packet, to generate > + * sample(n+1); sample(n+2) and sample(n+3) consume the > + * instructions with sample period. After sample(n+3), the rest > + * instructions will be used by later packet and it is assigned > + * to tidq->period_instructions for next round calculation. > + */ > > /* > - * Calculate the address of the sampled instruction (-1 as > - * sample is reported as though instruction has just been > - * executed, but PC has not advanced to next instruction) > + * Get the initial offset into the current packet instructions; > + * entry conditions ensure that instrs_prev is less than > + * etm->instructions_sample_period. > */ > - u64 offset = (instrs_executed - instrs_over - 1); > - u64 addr = cs_etm__instr_addr(etmq, trace_chan_id, > - tidq->packet, offset); > + u64 offset = etm->instructions_sample_period - instrs_prev; > + u64 addr; > > - ret = cs_etm__synth_instruction_sample( > - etmq, tidq, addr, etm->instructions_sample_period); > - if (ret) > - return ret; > + while (tidq->period_instructions >= > + etm->instructions_sample_period) { > + /* > + * Calculate the address of the sampled instruction (-1 > + * as sample is reported as though instruction has just > + * been executed, but PC has not advanced to next > + * instruction) > + */ > + addr = cs_etm__instr_addr(etmq, trace_chan_id, > + tidq->packet, offset - 1); > + ret = cs_etm__synth_instruction_sample( > + etmq, tidq, addr, > + etm->instructions_sample_period); > + if (ret) > + return ret; > > - /* Carry remaining instructions into next sample period */ > - tidq->period_instructions = instrs_over; > + offset += etm->instructions_sample_period; > + tidq->period_instructions -= > + etm->instructions_sample_period; > + } > } > > if (etm->sample_branches) { > -- > 2.17.1 > -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK