Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp4552312ybv; Mon, 17 Feb 2020 01:13:49 -0800 (PST) X-Google-Smtp-Source: APXvYqwNHP/dj2vPvGNcwV3jdzpBRERp1bybZhCvkQa+PlB5vVcQakgwHshWhE9ApbID0HzOetLC X-Received: by 2002:a05:6830:1e95:: with SMTP id n21mr11779643otr.25.1581930829441; Mon, 17 Feb 2020 01:13:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1581930829; cv=none; d=google.com; s=arc-20160816; b=gGOZHreRpKh71u+XBxlzxFEhaF2CAEy0MtDttaRUXO16ZpRDlze18bmCx7GsbwZMl+ 3JA0eCGHuMF4/QSfzpTNvTnaPKIEIyROSG2XELhc4rOOGg9mmO7ViBtH1I3BxcuEaL9q 8DYQ/iQWEhi1s0RP+5vvBxBQe3ZltlJ9twvvA9R7EYzmFxTOkqBqUzUjSvj32UJkk53K PQ04Je/SNZRK6xgoAKC9/g5ySKexeboxi3S71V/OBpWkW/WoqEboDycNvmjX6go3U3gz w06c5HI1Tpm9QaZnf5yVaKKiIf81cdWGnwKkT6quvA7uKaeTk4LPJSbF0OfE9ilzcK0k oLkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=9tK2rABE8Ex2u0L9jOcCWDKBuSSgDM0aL5QtJP7Kne4=; b=qxYvtMG5EHEMNtEymiBAxQWlzgxqdqyH9doKqU7ugZBRbygJxwcEv2UJRv9n76UkI9 BVSJ7pRZvToaWRPA+ZwpW0fg35c9Bcpug8ZRc5dzJLGYSpAoOi7gCN9m2g3Ss27pkgl+ 7j2dROybdIjOPjGgeubYw1yQBfT5RYB5B09POsxXYPitEHeUhT0mNkMuMOI5xyvl5AQQ TKwg7syusqPh0BuUgWO378RmJnt0O0kBICqoh6lO0lG9Wc4kTR9WHjvG353l9U03OU9B ew/M8Q9MILsPfZhGvZdlNZbi/clr2QFX/wQAu1PNjJBSsHA7e57nDKp4hYif7yroQVhF 8FAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id g6si6436877otk.171.2020.02.17.01.13.37; Mon, 17 Feb 2020 01:13:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728779AbgBQJMD (ORCPT + 99 others); Mon, 17 Feb 2020 04:12:03 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:43474 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728681AbgBQJMD (ORCPT ); Mon, 17 Feb 2020 04:12:03 -0500 Received: from DGGEMS411-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id C17C2B5DC1BA1A12947B; Mon, 17 Feb 2020 17:11:55 +0800 (CST) Received: from [127.0.0.1] (10.173.222.27) by DGGEMS411-HUB.china.huawei.com (10.3.19.211) with Microsoft SMTP Server id 14.3.439.0; Mon, 17 Feb 2020 17:11:48 +0800 Subject: Re: [PATCH v4 01/20] irqchip/gic-v4.1: Skip absent CPUs while iterating over redistributors To: Marc Zyngier , , , , CC: Lorenzo Pieralisi , Jason Cooper , Robert Richter , "Thomas Gleixner" , Eric Auger , "James Morse" , Julien Thierry , Suzuki K Poulose References: <20200214145736.18550-1-maz@kernel.org> <20200214145736.18550-2-maz@kernel.org> From: Zenghui Yu Message-ID: <1f86bcdd-01ca-4925-3163-d47e17d006ab@huawei.com> Date: Mon, 17 Feb 2020 17:11:47 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <20200214145736.18550-2-maz@kernel.org> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Marc, On 2020/2/14 22:57, Marc Zyngier wrote: > In a system that is only sparsly populated with CPUs, we can end-up with > redistributors structures that are not initialized. Let's make sure we > don't try and access those when iterating over them (in this case when > checking we have a L2 VPE table). > > Fixes: 4e6437f12d6e ("irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD level") > Signed-off-by: Marc Zyngier > --- > drivers/irqchip/irq-gic-v3-its.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > index 83b1186ffcad..da883a691028 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -2452,6 +2452,10 @@ static bool allocate_vpe_l2_table(int cpu, u32 id) > if (!gic_rdists->has_rvpeid) > return true; > > + /* Skip non-present CPUs */ > + if (!base) > + return true; > + Thanks for fixing this, Reviewed-by: Zenghui Yu > val = gicr_read_vpropbaser(base + SZ_128K + GICR_VPROPBASER); > > esz = FIELD_GET(GICR_VPROPBASER_4_1_ENTRY_SIZE, val) + 1; >