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[209.132.180.67]) by mx.google.com with ESMTP id v22si6320184oia.30.2020.02.17.04.39.49; Mon, 17 Feb 2020 04:40:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=W3P0OcO2; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728880AbgBQLzt (ORCPT + 99 others); Mon, 17 Feb 2020 06:55:49 -0500 Received: from mail-qt1-f195.google.com ([209.85.160.195]:41603 "EHLO mail-qt1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728773AbgBQLzs (ORCPT ); Mon, 17 Feb 2020 06:55:48 -0500 Received: by mail-qt1-f195.google.com with SMTP id l21so11778538qtr.8 for ; Mon, 17 Feb 2020 03:55:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=lY87+KOEZ6dGuNkZONRFyrPUlCbu+gnrKXQE8dlGuE4=; b=W3P0OcO2TvK2z/0LRMWHw4+JB1JA4XDZks9OBu2hNQT0Q2fQEKktTQQsjT6ePg+9T+ +ZgTVszIjaKtSk1VRvlhNfK/vj4JTKYDNTs7uz8h5qgddPvOVhoix4UcFUc15Mxm54q/ XCi0HTe9cUTOYMnmdLrJDyXXS8STOWkT6EINE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=lY87+KOEZ6dGuNkZONRFyrPUlCbu+gnrKXQE8dlGuE4=; b=KdSLTrmb2t0bvy3gaGhLAomxyoaaPcBI0BsACLyAizW3eT+mtItVzQs9zSEon93fmW mHLdIaYnTs7+PzY52sb/lES5ZuomJIJplGbs5ojA7kK10SP69/v7igzuHvF971M8b/AV cD/B7LpqmxTdwyvm6BFq2bXxXRbJMWSbP9OD0Q+LmluS261Np2kjyyKhZup6y0tld8d3 4kvZ2V3/m0RrsDyYTjDW3u+d1X18D0qmpnJrQs7nKN7L+s1vwODdQBtJ6Nan+awN0tWE SV8CSSMUT5gnx/VyiqOEzMNTKMsLX8hTYXBxWGyttyqYLPA/8EEQ/dNlGdlzfkVTez38 LLhw== X-Gm-Message-State: APjAAAW5BP5AgKwTH1ocx0jYbfbpRwl77DLXkI9qJ4mjwlRBLybliWDz eacMZY2+eOieQYjIhxkUebQhIh+Bm4Znx646+VzKRg== X-Received: by 2002:ac8:3946:: with SMTP id t6mr12871326qtb.278.1581940546729; Mon, 17 Feb 2020 03:55:46 -0800 (PST) MIME-Version: 1.0 References: <77c1e557-4941-3806-2933-6c3583576390@infradead.org> <20200203174937.GA18628@roeck-us.net> In-Reply-To: <20200203174937.GA18628@roeck-us.net> From: Nicolas Boichat Date: Mon, 17 Feb 2020 19:55:36 +0800 Message-ID: Subject: Re: [PATCH -next] watchdog: fix mtk_wdt.c RESET_CONTROLLER build error To: Guenter Roeck Cc: Randy Dunlap , LKML , "linux-watchdog@vger.kernel.org" , "wim@linux-watchdog.org" , Matthias Brugger Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Feb 4, 2020 at 1:49 AM Guenter Roeck wrote: > > On Mon, Feb 03, 2020 at 08:10:29AM -0800, Randy Dunlap wrote: > > From: Randy Dunlap > > > > Fix build error when CONFIG_RESET_CONTROLLER is not set by > > selecting RESET_CONTROLLER. > > > > ld: drivers/watchdog/mtk_wdt.o: in function `mtk_wdt_probe': > > mtk_wdt.c:(.text+0x3ec): undefined reference to `devm_reset_controller_register' > > > > Signed-off-by: Randy Dunlap > > Cc: Wim Van Sebroeck > > Cc: Guenter Roeck > > Cc: Matthias Brugger > > Cc: linux-watchdog@vger.kernel.org > > Reviewed-by: Guenter Roeck Wim: Can you please help pick this patch? This seems necessary. I'd also add this to the commit message: Fixes: c254e103082b74e ("watchdog: mtk_wdt: mt8183: Add reset controller") Thanks! > > --- > > drivers/watchdog/Kconfig | 1 + > > 1 file changed, 1 insertion(+) > > > > --- linux-next-20200203.orig/drivers/watchdog/Kconfig > > +++ linux-next-20200203/drivers/watchdog/Kconfig > > @@ -841,6 +841,7 @@ config MEDIATEK_WATCHDOG > > tristate "Mediatek SoCs watchdog support" > > depends on ARCH_MEDIATEK || COMPILE_TEST > > select WATCHDOG_CORE > > + select RESET_CONTROLLER > > help > > Say Y here to include support for the watchdog timer > > in Mediatek SoCs. > > > >