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[209.132.180.67]) by mx.google.com with ESMTP id j1si197612otr.207.2020.02.17.05.27.15; Mon, 17 Feb 2020 05:27:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=tlefjaaW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729110AbgBQNPP (ORCPT + 99 others); Mon, 17 Feb 2020 08:15:15 -0500 Received: from mail-wr1-f66.google.com ([209.85.221.66]:46243 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729043AbgBQNPM (ORCPT ); Mon, 17 Feb 2020 08:15:12 -0500 Received: by mail-wr1-f66.google.com with SMTP id z7so19653058wrl.13 for ; Mon, 17 Feb 2020 05:15:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=drss39w0znhLtWEMxoMFTDQiwBKNc2/yMB0OGM4BPBE=; b=tlefjaaWWdG9709HEt7hX/znNS9f06BoJtUQMXV+DvbSFVfB9w0VsPTQpTO9AkwusO cYgCC65QPxMSAqE/OCeShx1oAnszOJahFgalVSPTikQ3Ok5bVK591WZhjh8R1hHIQExC vJvdziJ++yrH36+IKbWPkzjPHSZ/xbhFPKm+LHfvh+5jiBMl2uDFX19Fc94DPKyq5Ecf FqcTmjbQ+CSQPOJ46p3qQqbQ23NRsxCr87FMK26Rsvvsnr5GEoMOt4GzzBQeEzfcIqAh ZYpQ/ubRB8szSuib819Udar6gAP5TmqJdWOHqmYljkFJ1c6VeHXxAaRZsB+oIh9D9IFe /PeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=drss39w0znhLtWEMxoMFTDQiwBKNc2/yMB0OGM4BPBE=; b=WnEGsZOgKsYWtVv4/PYisberb0sOQl9pYQgpbHrfq636MWSripgnvVVXmx9LwbfNWK M7bqojahIKPPjXz90EpcwwZf8E0/9Twyne0dhyJsaXvVixzRcH7YRmo2mlSAA80IG+4K xMcl3aDtBMvV0JoKvGA+Vou84VNAEDQyBm3VN7fTFMRfWW/DI0ZWTLSTAorpcIpPANFJ 19VMq7B07JvjMQpITRKkQ4Ak2YcM+a0Gwl9kFpXOtffPQy0CcBNK6+iCDlquhatoOY1N 0uL1nhicMuO+uH+Xc6W/rm7/KlsHzdwfLhTUW0XBmcc4lEQnaqUfmaVaLytHYUlbFRX1 RFBQ== X-Gm-Message-State: APjAAAXdWvMRTFL6zSHArbBZKq96981H8cIU89TRVC+UbIkjPFTzXV/u wZ3fsTfvAaGgnEr3cQqAB+0CVvWMTfLJvEkPyhbe0GlEd4A= X-Received: by 2002:adf:f401:: with SMTP id g1mr21799460wro.129.1581945310491; Mon, 17 Feb 2020 05:15:10 -0800 (PST) MIME-Version: 1.0 References: <20200107092922.18408-1-ktouil@baylibre.com> <20200107092922.18408-3-ktouil@baylibre.com> In-Reply-To: From: Khouloud Touil Date: Mon, 17 Feb 2020 14:14:59 +0100 Message-ID: Subject: Re: [PATCH v4 2/5] nvmem: add support for the write-protect pin To: Geert Uytterhoeven Cc: Bartosz Golaszewski , Rob Herring , Mark Rutland , Srinivas Kandagatla , baylibre-upstreaming@groups.io, Linux Kernel Mailing List , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux I2C , Linus Walleij Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le jeu. 30 janv. 2020 =C3=A0 09:06, Geert Uytterhoeven a =C3=A9crit : > > Hi Khouloud, > > On Tue, Jan 7, 2020 at 10:30 AM Khouloud Touil wrot= e: > > The write-protect pin handling looks like a standard property that > > could benefit other users if available in the core nvmem framework. > > > > Instead of modifying all the memory drivers to check this pin, make > > the NVMEM subsystem check if the write-protect GPIO being passed > > through the nvmem_config or defined in the device tree and pull it > > low whenever writing to the memory. > > > > There was a suggestion for introducing the gpiodesc from pdata, but > > as pdata is already removed it could be replaced by adding it to > > nvmem_config. > > > > Reference: https://lists.96boards.org/pipermail/dev/2018-August/001056.= html > > > > Signed-off-by: Khouloud Touil > > Reviewed-by: Linus Walleij > > Acked-by: Srinivas Kandagatla > > Thanks for your patch! > > > --- a/drivers/nvmem/core.c > > +++ b/drivers/nvmem/core.c > > @@ -15,6 +15,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > #include "nvmem.h" > > @@ -54,8 +55,14 @@ static int nvmem_reg_read(struct nvmem_device *nvmem= , unsigned int offset, > > static int nvmem_reg_write(struct nvmem_device *nvmem, unsigned int of= fset, > > void *val, size_t bytes) > > { > > - if (nvmem->reg_write) > > - return nvmem->reg_write(nvmem->priv, offset, val, bytes= ); > > + int ret; > > + > > + if (nvmem->reg_write) { > > + gpiod_set_value_cansleep(nvmem->wp_gpio, 0); > > + ret =3D nvmem->reg_write(nvmem->priv, offset, val, byte= s); > > + gpiod_set_value_cansleep(nvmem->wp_gpio, 1); > > + return ret; > > + } > > > > return -EINVAL; > > } > > @@ -338,6 +345,14 @@ struct nvmem_device *nvmem_register(const struct n= vmem_config *config) > > kfree(nvmem); > > return ERR_PTR(rval); > > } > > + if (config->wp_gpio) > > + nvmem->wp_gpio =3D config->wp_gpio; > > + else > > + nvmem->wp_gpio =3D gpiod_get_optional(config->dev, "wp"= , > > + GPIOD_OUT_HIGH); > > Shouldn't this GPIO be released in nvmem_release(), by calling gpiod_put(= )? > > Once that's implemented, I assume it will be auto-released on registratio= n > failure by the call to put_device()? Hello Geert, Thanks for your review. Yes you are right, I will add that Khouloud, > > > + if (IS_ERR(nvmem->wp_gpio)) > > + return PTR_ERR(nvmem->wp_gpio); > > + > > > > kref_init(&nvmem->refcnt); > > INIT_LIST_HEAD(&nvmem->cells); > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m6= 8k.org > > In personal conversations with technical people, I call myself a hacker. = But > when I'm talking to journalists I just say "programmer" or something like= that. > -- Linus Torvalds