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From:   "Pankaj Bansal (OSS)" <pankaj.bansal@oss.nxp.com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
CC:     Marc Zyngier <maz@kernel.org>,
        Ard Biesheuvel <ard.biesheuvel@linaro.org>,
        Makarand Pawagi <makarand.pawagi@nxp.com>,
        Calvin Johnson <calvin.johnson@nxp.com>,
        "stuyoder@gmail.com" <stuyoder@gmail.com>,
        "nleeder@codeaurora.org" <nleeder@codeaurora.org>,
        Ioana Ciornei <ioana.ciornei@nxp.com>,
        Cristi Sovaiala <cristian.sovaiala@nxp.com>,
        Hanjun Guo <guohanjun@huawei.com>,
        Will Deacon <will@kernel.org>,
        "jon@solid-run.com" <jon@solid-run.com>,
        Russell King <linux@armlinux.org.uk>,
        ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
        Len Brown <lenb@kernel.org>,
        Jason Cooper <jason@lakedaemon.net>,
        Andy Wang <Andy.Wang@arm.com>, Varun Sethi <V.Sethi@nxp.com>,
        Thomas Gleixner <tglx@linutronix.de>,
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        Laurentiu Tudor <laurentiu.tudor@nxp.com>,
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        Shameerali Kolothum Thodi 
        <shameerali.kolothum.thodi@huawei.com>,
        Sudeep Holla <sudeep.holla@arm.com>,
        Robin Murphy <robin.murphy@arm.com>
Subject: RE: Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc
Thread-Topic: Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc
Thread-Index: AdXmMUccpWvJlrLjQUGeP0U0UIbIhA==
Date:   Tue, 18 Feb 2020 08:00:09 +0000
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> -----Original Message-----
> From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Sent: Monday, February 17, 2020 8:55 PM
> To: Pankaj Bansal <pankaj.bansal@nxp.com>
> Cc: Marc Zyngier <maz@kernel.org>; Ard Biesheuvel
> <ard.biesheuvel@linaro.org>; Makarand Pawagi <makarand.pawagi@nxp.com>;
> Calvin Johnson <calvin.johnson@nxp.com>; stuyoder@gmail.com;
> nleeder@codeaurora.org; Ioana Ciornei <ioana.ciornei@nxp.com>; Cristi
> Sovaiala <cristian.sovaiala@nxp.com>; Hanjun Guo <guohanjun@huawei.com>;
> Will Deacon <will@kernel.org>; jon@solid-run.com; Russell King
> <linux@armlinux.org.uk>; ACPI Devel Maling List <linux-acpi@vger.kernel.o=
rg>;
> Len Brown <lenb@kernel.org>; Jason Cooper <jason@lakedaemon.net>; Andy
> Wang <Andy.Wang@arm.com>; Varun Sethi <V.Sethi@nxp.com>; Thomas
> Gleixner <tglx@linutronix.de>; linux-arm-kernel <linux-arm-
> kernel@lists.infradead.org>; Laurentiu Tudor <laurentiu.tudor@nxp.com>; P=
aul
> Yang <Paul.Yang@arm.com>; netdev@vger.kernel.org; Rafael J. Wysocki
> <rjw@rjwysocki.net>; Linux Kernel Mailing List <linux-kernel@vger.kernel.=
org>;
> Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> Sudeep Holla <sudeep.holla@arm.com>; Robin Murphy
> <robin.murphy@arm.com>
> Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-mc
>=20
> On Mon, Feb 17, 2020 at 12:35:12PM +0000, Pankaj Bansal wrote:
> >
> >
> > > -----Original Message-----
> > > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Sent: Friday, February 14, 2020 11:20 PM
> > > To: Pankaj Bansal <pankaj.bansal@nxp.com>
> > > Cc: Marc Zyngier <maz@kernel.org>; Ard Biesheuvel
> > > <ard.biesheuvel@linaro.org>; Makarand Pawagi
> <makarand.pawagi@nxp.com>;
> > > Calvin Johnson <calvin.johnson@nxp.com>; stuyoder@gmail.com;
> > > nleeder@codeaurora.org; Ioana Ciornei <ioana.ciornei@nxp.com>; Cristi
> > > Sovaiala <cristian.sovaiala@nxp.com>; Hanjun Guo
> <guohanjun@huawei.com>;
> > > Will Deacon <will@kernel.org>; jon@solid-run.com; Russell King
> > > <linux@armlinux.org.uk>; ACPI Devel Maling List <linux-
> acpi@vger.kernel.org>;
> > > Len Brown <lenb@kernel.org>; Jason Cooper <jason@lakedaemon.net>;
> Andy
> > > Wang <Andy.Wang@arm.com>; Varun Sethi <V.Sethi@nxp.com>; Thomas
> > > Gleixner <tglx@linutronix.de>; linux-arm-kernel <linux-arm-
> > > kernel@lists.infradead.org>; Laurentiu Tudor <laurentiu.tudor@nxp.com=
>;
> Paul
> > > Yang <Paul.Yang@arm.com>; netdev@vger.kernel.org; Rafael J. Wysocki
> > > <rjw@rjwysocki.net>; Linux Kernel Mailing List <linux-
> kernel@vger.kernel.org>;
> > > Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> > > Sudeep Holla <sudeep.holla@arm.com>; Robin Murphy
> > > <robin.murphy@arm.com>
> > > Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for fsl-=
mc
> > >
> > > On Fri, Feb 14, 2020 at 04:35:10PM +0000, Pankaj Bansal wrote:
> > >
> > > [...]
> > >
> > > > > -----Original Message-----
> > > > > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > > > Sent: Friday, February 14, 2020 9:50 PM
> > > > > To: Pankaj Bansal <pankaj.bansal@nxp.com>
> > > > > Cc: Marc Zyngier <maz@kernel.org>; Ard Biesheuvel
> > > > > <ard.biesheuvel@linaro.org>; Makarand Pawagi
> > > <makarand.pawagi@nxp.com>;
> > > > > Calvin Johnson <calvin.johnson@nxp.com>; stuyoder@gmail.com;
> > > > > nleeder@codeaurora.org; Ioana Ciornei <ioana.ciornei@nxp.com>; Cr=
isti
> > > > > Sovaiala <cristian.sovaiala@nxp.com>; Hanjun Guo
> > > <guohanjun@huawei.com>;
> > > > > Will Deacon <will@kernel.org>; jon@solid-run.com; Russell King
> > > > > <linux@armlinux.org.uk>; ACPI Devel Maling List <linux-
> > > acpi@vger.kernel.org>;
> > > > > Len Brown <lenb@kernel.org>; Jason Cooper <jason@lakedaemon.net>;
> > > Andy
> > > > > Wang <Andy.Wang@arm.com>; Varun Sethi <V.Sethi@nxp.com>;
> Thomas
> > > > > Gleixner <tglx@linutronix.de>; linux-arm-kernel <linux-arm-
> > > > > kernel@lists.infradead.org>; Laurentiu Tudor
> <laurentiu.tudor@nxp.com>;
> > > Paul
> > > > > Yang <Paul.Yang@arm.com>; netdev@vger.kernel.org; Rafael J. Wysoc=
ki
> > > > > <rjw@rjwysocki.net>; Linux Kernel Mailing List <linux-
> > > kernel@vger.kernel.org>;
> > > > > Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> > > > > Sudeep Holla <sudeep.holla@arm.com>; Robin Murphy
> > > > > <robin.murphy@arm.com>
> > > > > Subject: Re: [EXT] Re: [PATCH] bus: fsl-mc: Add ACPI support for =
fsl-mc
> > > Side note: would you mind removing the email headers (as above) in yo=
ur
> > > replies please ?
>=20
> Read the question above please.
>=20
> [...]
>=20
> > > > As stated above, in Linux MC is a bus (just like PCI bus, AMBA bus =
etc)
> > > > There can be multiple devices attached to this bus. Moreover, we ca=
n
> > > dynamically create/destroy these devices.
> > > > Now, we want to represent this BUS (not individual devices connecte=
d to
> bus)
> > > in IORT table.
> > > > The only possible way right now we see is that we describe it as Na=
med
> > > components having a pool of ID mappings.
> > > > As and when devices are created and attached to bus, we sift throug=
h this
> pool
> > > to correctly determine the output ID for the device.
> > > > Now the input ID that we provide, can come from device itself.
> > > > Then we can use the Platform MSI framework for MC bus devices.
> > >
> > > So are you asking me if that's OK ? Or there is something you can't
> > > describe with IORT ?
> >
> > I am asking if that would be acceptable?
> > i.e. we represent MC bus as Named component is IORT table with a pool o=
f IDs
> (without single ID mapping flag)
> > and then we use the Platform MSI framework for all children devices of =
MC
> bus.
> > Note that it would require the Platform MSI layer to correctly pass an =
input id
> for a platform device to IORT layer.
>=20
> How is this solved in DT ? You don't seem to need any DT binding on top
> of the msi-parent property, which is equivalent to IORT single mappings
> AFAICS so I would like to understand the whole DT flow (so that I
> understand how this FSL bus works) before commenting any further.

In DT case, we create the domain DOMAIN_BUS_FSL_MC_MSI for MC bus and it's =
children.
And then when MC child device is created, we search the "msi-parent" proper=
ty from the MC
DT node and get the ITS associated with MC bus. Then we search DOMAIN_BUS_F=
SL_MC_MSI
on that ITS. Once we find the domain, we can call msi_domain_alloc_irqs for=
 that domain.

This is exactly what we tried to do initially with ACPI. But the searching =
DOMAIN_BUS_FSL_MC_MSI
associated to an ITS, is something that is part of drivers/acpi/arm64/iort.=
c.
(similar to DOMAIN_BUS_PLATFORM_MSI and DOMAIN_BUS_PCI_MSI)

>=20
> > And IORT layer ought to retrieve the output id based on single ID mappi=
ng flag
> as well as input id.
> >
> > >
> > > Side note: can you explain to me please how the MSI allocation flow
> > > and kernel data structures/drivers are modeled in DT ? I had a quick
> > > look at:
> > >
> > > drivers/irqchip/irq-gic-v3-its-fsl-mc-msi.c
> > >
> > > and to start with, does that code imply that we create a
> > > DOMAIN_BUS_FSL_MC_MSI on ALL DT systems with an ITS device node ?
> >
> > Yes. It's being done for all DT systems having ITS node.
>=20
> This does not seem correct to me, I will let Marc comment on
> the matter.
>=20
> > The domain creation is handled in drivers/bus/fsl-mc/fsl-mc-msi.c
>=20
> Thanks,
> Lorenzo