Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp6101686ybv; Tue, 18 Feb 2020 09:55:48 -0800 (PST) X-Google-Smtp-Source: APXvYqwsV3CVFWiRhw9J6nYoeQhty7TMh3lCEI6AUfnSKkJvWZsw4hZ7N3k4GZyhun1IBL8FQh41 X-Received: by 2002:aca:c256:: with SMTP id s83mr2077007oif.57.1582048548203; Tue, 18 Feb 2020 09:55:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1582048548; cv=none; d=google.com; s=arc-20160816; b=a60kCLaRbnIhIA3gd0HDQZ26naFUo2hgzXQO+fKcu0o+vGopWRY27Dw9Up/3lwxDri u3PdDIX6gxcGtraQOI8v17YWwy2T11Z1B2+yZqQv21usLHQJKRJTKtHKCFjGwutBdXA7 ff0uN/G7wEcI89okymmpxIBrwHDoyYC/FQxl4AjcUXMcritdlrrx1k67ttRI4c/EkjjV f/PShj1cgrTNAjfo0/YUQa1+UdaDprRxm0uyVOfwpp+OEdVoom0eRnW/5Z8yH/YJnD04 H8P+1cZcUcMLk2dArOPNszTW4nsubxc9t1+LTiP0ie9mz2aSlx2Ru889/Sgz2z9Mf4rL iBAA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=SriTHKiTXZ7JmDU7otU5tg8ZiCJP4VOvkCaiuQoe96g=; b=nGJtOT8co0YT/ACnirPNzpNMMSVuY+vSqkaTBVlTYXhn1UXC7qbX/xKGdae99G1L72 BBjKw8hMgYjl6x8LFvrO4LdOGBfxmbLjmDGjeafMFORUACTOXjtosvKZCSEjlY+J1Cce sgitQ1lkS6VnH1fqV/KgKbH69YZQZ+M2qCj+8oeQYHpLCQScQkYUgG5QsgRusKwCmFGb S7Mij0eEFmWqwll5z+mORkQ9nyUY2EX9/83udTCu+O3prCEJG0eORAtJndKXsc4KanLg hFNN5J3MG1tluAyg2irieKlP8UmhJBGiSQSBDptZhlkrrHj3PN0CN/jurD0qPi2+tzMD xgpw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z7si2103525oth.181.2020.02.18.09.55.35; Tue, 18 Feb 2020 09:55:48 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726766AbgBRRxs (ORCPT + 99 others); Tue, 18 Feb 2020 12:53:48 -0500 Received: from mail-out.m-online.net ([212.18.0.9]:42650 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726411AbgBRRxs (ORCPT ); Tue, 18 Feb 2020 12:53:48 -0500 Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 48MT4B1LRdz1qrLp; Tue, 18 Feb 2020 18:53:46 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.70]) by mail.m-online.net (Postfix) with ESMTP id 48MT4B0VT8z1qqkc; Tue, 18 Feb 2020 18:53:46 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.70]) (amavisd-new, port 10024) with ESMTP id 7a4_xjb2W3Wt; Tue, 18 Feb 2020 18:53:44 +0100 (CET) X-Auth-Info: +1fpDYi5PO7Wc+uaFk/H/AOq0cR/pIY5FLcDyTGbJJI= Received: from [IPv6:::1] (unknown [195.140.253.167]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Tue, 18 Feb 2020 18:53:44 +0100 (CET) Subject: Re: [PATCH v2 2/2] pinctrl: stm32: Add level interrupt support to gpio irq chip To: Alexandre Torgue , Thomas Gleixner , Jason Cooper , Marc Zyngier , Linus Walleij Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org References: <20200218131218.10789-1-alexandre.torgue@st.com> <20200218131218.10789-3-alexandre.torgue@st.com> From: Marek Vasut Message-ID: <139584ff-4452-b576-f22b-ce2b24869e46@denx.de> Date: Tue, 18 Feb 2020 18:51:44 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <20200218131218.10789-3-alexandre.torgue@st.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2/18/20 2:12 PM, Alexandre Torgue wrote: > This patch adds level interrupt support to gpio irq chip. > > GPIO hardware block is directly linked to EXTI block but EXTI handles > external interrupts only on edge. To be able to handle GPIO interrupt on > level a "hack" is done in gpio irq chip: parent interrupt (exti irq chip) > is retriggered following interrupt type and gpio line value. > > Signed-off-by: Alexandre Torgue > Tested-by: Marek Vasut Reviewed-by: Marek Vasut (and I tested the previous version on STM32MP1)