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Date:   Wed, 19 Feb 2020 13:09:30 +0530
From:   Vinod Koul <vkoul@kernel.org>
To:     Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc:     dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
        dan.j.williams@intel.com, grygorii.strashko@ti.com, vigneshr@ti.com
Subject: Re: [PATCH v2 0/6] dmaengine: ti: k3-udma: Fixes for 5.6
Message-ID: <20200219073930.GD2618@vkoul-mobl>
References: <20200214091441.27535-1-peter.ujfalusi@ti.com>
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On 14-02-20, 11:14, Peter Ujfalusi wrote:
> Hi Vinod,
> 
> Recently we have uncovered silicon and driver issues which was not addressed in
> the initial driver:
> 
> 1. RX channel teardown will lock up the channel if we have stale data
> in the DMA FIFOs and we don't have active transfer (no descriptor for UDMA).
> The workaround is to use a dummy drain packet in these cases.
> 
> 2. Early TX completion handling
> The delayed work approach was not working efficiently causing the UART, SPI
> performance to degrade, with the patch from Vignesh we see 10x performance
> increase
> 
> 3. TR setup for slave_sg
> It was possible that the sg_len() was not multiple of 'burst * dev_width' and
> because of this we ended up with incorrect TR setups.
> Using a single function for TR setup makes things simpler and error prone among
> slave_sg, cyclic and memcpy
> 
> 4. Pause/Resume causes kernel crash
> if it was called when we did not had active transfer the uc->desc was NULL.
> 
> 5. The terminated cookie was never marked as completed
> client will think that it is still in progress, which is not the case.
> Also adding back the check for running channel in tx_status since if the channel
> is not running then it implies that it has been terminated, so no transfer is
> running.

Applied to fixes

Thanks

-- 
~Vinod