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Wed, 19 Feb 2020 02:29:35 -0800 (PST) MIME-Version: 1.0 References: <20200128090636.13689-1-ludovic.barre@st.com> <20200128090636.13689-10-ludovic.barre@st.com> <853f4b14-a188-f329-34e5-8e88fcafa775@st.com> In-Reply-To: <853f4b14-a188-f329-34e5-8e88fcafa775@st.com> From: Ulf Hansson Date: Wed, 19 Feb 2020 11:28:59 +0100 Message-ID: Subject: Re: [PATCH V2 9/9] mmc: mmci: add sdmmc variant revision 2.0 To: Ludovic BARRE Cc: Rob Herring , Srinivas Kandagatla , Maxime Coquelin , Alexandre Torgue , Linux ARM , Linux Kernel Mailing List , DTML , "linux-mmc@vger.kernel.org" , linux-stm32@st-md-mailman.stormreply.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 11 Feb 2020 at 15:44, Ludovic BARRE wrote: > > hi Ulf > > Le 1/28/20 =C3=A0 10:06 AM, Ludovic Barre a =C3=A9crit : > > This patch adds a sdmmc variant revision 2.0. > > This revision is backward compatible with 1.1, and adds dma > > link list support. > > > > Signed-off-by: Ludovic Barre > > --- > > drivers/mmc/host/mmci.c | 30 ++++++++++++++++++++++++++++++ > > 1 file changed, 30 insertions(+) > > > > diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c > > index 24e630183ed4..a774c329c212 100644 > > --- a/drivers/mmc/host/mmci.c > > +++ b/drivers/mmc/host/mmci.c > > @@ -275,6 +275,31 @@ static struct variant_data variant_stm32_sdmmc =3D= { > > .init =3D sdmmc_variant_init, > > }; > > > > +static struct variant_data variant_stm32_sdmmcv2 =3D { > > + .fifosize =3D 16 * 4, > > + .fifohalfsize =3D 8 * 4, > > + .f_max =3D 208000000, > > + .stm32_clkdiv =3D true, > > + .cmdreg_cpsm_enable =3D MCI_CPSM_STM32_ENABLE, > > + .cmdreg_lrsp_crc =3D MCI_CPSM_STM32_LRSP_CRC, > > + .cmdreg_srsp_crc =3D MCI_CPSM_STM32_SRSP_CRC, > > + .cmdreg_srsp =3D MCI_CPSM_STM32_SRSP, > > + .cmdreg_stop =3D MCI_CPSM_STM32_CMDSTOP, > > + .data_cmd_enable =3D MCI_CPSM_STM32_CMDTRANS, > > + .irq_pio_mask =3D MCI_IRQ_PIO_STM32_MASK, > > + .datactrl_first =3D true, > > + .datacnt_useless =3D true, > > + .datalength_bits =3D 25, > > + .datactrl_blocksz =3D 14, > > + .datactrl_any_blocksz =3D true, > > + .stm32_idmabsize_mask =3D GENMASK(16, 5), > > + .dma_lli =3D true, > > + .busy_timeout =3D true, > > I forget "busy_detect =3D true," property > I add this in next patch set No need for a re-send, I amended this when I applied it. > > > + .busy_detect_flag =3D MCI_STM32_BUSYD0, > > + .busy_detect_mask =3D MCI_STM32_BUSYD0ENDMASK, > > + .init =3D sdmmc_variant_init, > > +}; > > + > > static struct variant_data variant_qcom =3D { > > .fifosize =3D 16 * 4, > > .fifohalfsize =3D 8 * 4, > > @@ -2343,6 +2368,11 @@ static const struct amba_id mmci_ids[] =3D { > > .mask =3D 0xf0ffffff, > > .data =3D &variant_stm32_sdmmc, > > }, > > + { > > + .id =3D 0x00253180, > > + .mask =3D 0xf0ffffff, > > + .data =3D &variant_stm32_sdmmcv2, > > + }, > > /* Qualcomm variants */ > > { > > .id =3D 0x00051180, > > Kind regards Uffe