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Thu, 20 Feb 2020 09:31:17 -0800 (PST) Received: from big-machine ([2a00:23c5:dd80:8400:98d8:49e6:cdcc:25df]) by smtp.gmail.com with ESMTPSA id y8sm8190wma.10.2020.02.20.09.31.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2020 09:31:17 -0800 (PST) Date: Thu, 20 Feb 2020 17:31:15 +0000 From: Andrew Murray To: Zhiqiang Hou Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, andrew.murray@arm.com, arnd@arndb.de, mark.rutland@arm.com, l.subrahmanya@mobiveil.co.in, shawnguo@kernel.org, m.karthikeyan@mobiveil.co.in, leoyang.li@nxp.com, lorenzo.pieralisi@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Mingkai.Hu@nxp.com, Minghuan.Lian@nxp.com, Xiaowei.Bao@nxp.com Subject: Re: [PATCHv10 09/13] PCI: mobiveil: Add Header Type field check Message-ID: <20200220173115.GJ19388@big-machine> References: <20200213040644.45858-1-Zhiqiang.Hou@nxp.com> <20200213040644.45858-10-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200213040644.45858-10-Zhiqiang.Hou@nxp.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 13, 2020 at 12:06:40PM +0800, Zhiqiang Hou wrote: > From: Hou Zhiqiang > > Check the Header Type and exit from the host driver initialization if > it is not in host mode. > > Signed-off-by: Hou Zhiqiang Reviewed-by: Andrew Murray > --- > V10: > - New patch separated from #10 of v9. > > .../pci/controller/mobiveil/pcie-mobiveil-host.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > index 44dd641fede3..db7028788d91 100644 > --- a/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > +++ b/drivers/pci/controller/mobiveil/pcie-mobiveil-host.c > @@ -554,6 +554,16 @@ static int mobiveil_pcie_interrupt_init(struct mobiveil_pcie *pcie) > return mobiveil_pcie_integrated_interrupt_init(pcie); > } > > +static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie *pcie) > +{ > + u32 header_type; > + > + header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE); > + header_type &= 0x7f; > + > + return header_type == PCI_HEADER_TYPE_BRIDGE; > +} > + > int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) > { > struct mobiveil_root_port *rp = &pcie->rp; > @@ -569,6 +579,9 @@ int mobiveil_pcie_host_probe(struct mobiveil_pcie *pcie) > return ret; > } > > + if (!mobiveil_pcie_is_bridge(pcie)) > + return -ENODEV; > + > /* parse the host bridge base addresses from the device tree file */ > ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, > &bridge->dma_ranges, NULL); > -- > 2.17.1 >