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Fri, 21 Feb 2020 05:04:52 -0800 (PST) Received: from linaro.org ([2a01:e34:ed2f:f020:2dfb:b5ce:9043:4adb]) by smtp.gmail.com with ESMTPSA id z10sm3561868wmk.31.2020.02.21.05.04.50 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 21 Feb 2020 05:04:51 -0800 (PST) Date: Fri, 21 Feb 2020 14:04:48 +0100 From: Daniel Lezcano To: Anson Huang Cc: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, catalin.marinas@arm.com, will@kernel.org, rui.zhang@intel.com, amit.kucheria@verdurent.com, aisheng.dong@nxp.com, linux@roeck-us.net, srinivas.kandagatla@linaro.org, krzk@kernel.org, fugang.duan@nxp.com, peng.fan@nxp.com, daniel.baluta@nxp.com, bjorn.andersson@linaro.org, olof@lixom.net, dinguyen@kernel.org, leonard.crestez@nxp.com, marcin.juszkiewicz@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, Linux-imx@nxp.com Subject: Re: [PATCH V15 RESEND 5/5] arm64: dts: imx: add i.MX8QXP thermal support Message-ID: <20200221130448.GC10516@linaro.org> References: <1582161028-2844-1-git-send-email-Anson.Huang@nxp.com> <1582161028-2844-5-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1582161028-2844-5-git-send-email-Anson.Huang@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 20, 2020 at 09:10:28AM +0800, Anson Huang wrote: > Add i.MX8QXP CPU thermal zone support. > > Signed-off-by: Anson Huang > --- > No change. > --- > arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 36 ++++++++++++++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > index fb5f752..0a14fe4 100644 > --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi > @@ -11,6 +11,7 @@ > #include > #include > #include > +#include > > / { > interrupt-parent = <&gic>; > @@ -189,6 +190,11 @@ > compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt"; > timeout-sec = <60>; > }; > + > + tsens: thermal-sensor { > + compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal"; > + #thermal-sensor-cells = <1>; > + }; > }; > > timer { > @@ -586,4 +592,34 @@ > #clock-cells = <1>; > }; > }; > + > + thermal_zones: thermal-zones { > + cpu-thermal0 { > + polling-delay-passive = <250>; > + polling-delay = <2000>; > + thermal-sensors = <&tsens IMX_SC_R_SYSTEM>; > + trips { > + cpu_alert0: trip0 { > + temperature = <107000>; > + hysteresis = <2000>; > + type = "passive"; > + }; May be you can add a 'hot' trip point before 'critical' for future use before reaching the emergency shutdown. > + cpu_crit0: trip1 { > + temperature = <127000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + }; > + cooling-maps { > + map0 { > + trip = <&cpu_alert0>; > + cooling-device = > + <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > }; > -- > 2.7.4 > -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog