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Date:   Sat, 22 Feb 2020 17:46:08 +0100
From:   Andreas Kemnade <andreas@kemnade.info>
To:     "H. Nikolaus Schaller" <hns@goldelico.com>
Cc:     PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>,
        Paul Cercueil <paul@crapouillou.net>,
        Mathieu Malaterre <malat@debian.org>,
        Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Ralf Baechle <ralf@linux-mips.org>,
        Paul Burton <paulburton@kernel.org>,
        Mauro Carvalho Chehab <mchehab+samsung@kernel.org>,
        "David S. Miller" <davem@davemloft.net>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Kees Cook <keescook@chromium.org>,
        Andi Kleen <ak@linux.intel.com>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
        linux-mips@vger.kernel.org, letux-kernel@openphoenux.org,
        kernel@pyra-handheld.com
Subject: Re: [PATCH v5 2/6] Bindings: nvmem: add bindings for JZ4780 efuse
Message-ID: <20200222174408.10588e32@kemnade.info>
In-Reply-To: <D59DC84C-837E-4856-8FED-580381F748FF@goldelico.com>
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On Sat, 22 Feb 2020 17:34:06 +0100
"H. Nikolaus Schaller" <hns@goldelico.com> wrote:

> > Am 22.02.2020 um 16:57 schrieb Andreas Kemnade <andreas@kemnade.info>:
> >=20
> > On Sat, 22 Feb 2020 11:25:37 +0100
> > "H. Nikolaus Schaller" <hns@goldelico.com> wrote:
> >  =20
> >> From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
> >>=20
> >> This patch brings support for the JZ4780 efuse. Currently it only expo=
ses
> >> a read only access to the entire 8K bits efuse memory.
> >>=20
> >> Tested-by: Mathieu Malaterre <malat@debian.org>
> >> Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
> >> Signed-off-by: Mathieu Malaterre <malat@debian.org>
> >> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> >> [converted to yaml]
> >> Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
> >> ---
> >> .../bindings/nvmem/ingenic,jz4780-efuse.yaml  | 50 +++++++++++++++++++
> >> 1 file changed, 50 insertions(+)
> >> create mode 100644 Documentation/devicetree/bindings/nvmem/ingenic,jz4=
780-efuse.yaml
> >>=20
> >> diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-ef=
use.yaml b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
> >> new file mode 100644
> >> index 000000000000..09a8ef937750
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml
> >> @@ -0,0 +1,50 @@
> >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> >> +%YAML 1.2
> >> +---
> >> +$id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#
> >> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> >> +
> >> +title: Ingenic JZ EFUSE driver bindings
> >> +
> >> +maintainers:
> >> +  - PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
> >> +
> >> +allOf:
> >> +  - $ref: "nvmem.yaml#"
> >> +
> >> +properties:
> >> +  compatible:
> >> +    enum:
> >> +      - ingenic,jz4780-efuse
> >> +
> >> +  reg:
> >> +    maxItems: 1
> >> +
> >> +  clocks:
> >> +    # Handle for the ahb for the efuse.
> >> +    maxItems: 1
> >> +
> >> +  clock-names:
> >> +   items:
> >> +     - const:  ahb2 =20
> > as Rob said: probably not needed, since it is a single
> > clock, and the driver uses devm_clk_get(dev, NULL), so it should be pre=
pared
> > for that without any extra work. =20
>=20
> The question is if a specific driver implementation should determine
> what the DT requires or the other way round. I don't know...
>=20
> I did interpret Rob's comment differently: there was
>=20
> > - "clock-names"		Must be "bus_clk" =20
>=20
> and he did say:=20
>=20
> 	'clk' is redundant. How about 'ahb'?
>=20
> So I thought he refers to the _clk suffix?
>=20

and he said to my first try:
---
> +  clock-names:
> +   items:
> +     - const:  bus_clk =20

My prior comment still applies.

Also, for a single clock, you don't really need a name.
---

Regards,
Andreas

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