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x-originating-ip: [117.82.241.14] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: b341fb73-13ae-418f-6517-08d7b8c68e0d x-ms-traffictypediagnostic: AM0PR04MB5219:|AM0PR04MB5219: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:6790; x-forefront-prvs: 032334F434 x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(39860400002)(376002)(346002)(366004)(396003)(136003)(189003)(199004)(966005)(45080400002)(71200400001)(8936002)(81156014)(2906002)(81166006)(44832011)(52536014)(7416002)(478600001)(8676002)(316002)(54906003)(66556008)(66446008)(66476007)(66946007)(64756008)(5660300002)(86362001)(7696005)(33656002)(186003)(6506007)(4326008)(110136005)(9686003)(55016002)(76116006)(26005);DIR:OUT;SFP:1101;SCL:1;SRVR:AM0PR04MB5219;H:AM0PR04MB4481.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;MX:1;A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: y0zFqWr8XxSfa/U4KYq1jt/Thnl0nVgxGmtLOwQHAYRPFGTKskRu8/MTsJ5UrBegCsboWtLhNIF7hs6hSPjv2nJgmnjM72jMIb85w4+FuGOIgbU3tcXQZ08ctpOXgi0zqEL0AHfuz01RBf8rH+BDsphxHdTOM7OFG0zTAcquVBe5quExcT/pZmYXK4i2+g/hyRv9O+TWJdGwNkyo+CeDiHtGLFur1F1lkS7u6AhlSeC9gyBYRqyF3Rod5hxCHNuZi43CM25ARTaofe6OwyJdWLvGnKUrxyMFsCsUMfVbSh7POpegzMZR1eH5I2hNSteZFBAIJZULPiNlymEaAqf+UNoE40vY0eaYr+GCytCbRpxtSm6uqWGddzdeQuLpZquzRt/+wvSwuWsTHIT2nhiddqjl4xfu6iWgjl+UM5nTuQEVGiIPLs785z3ygT69HO23v7RTvBWzvq9gMTjXjnkYBbLBSN8nlKcwmSeZyuwxH3IzdLlUsoVaZzNtFH2zlSZxGQJmXyru5RAae1UB2IsROA== x-ms-exchange-antispam-messagedata: g8kj1ZqOhYQHDKRbs/YflHBWiuxrFunP1+F4CxAniyBb8JoBv8+jdUz6XfvPbLCFXDZmiVHBNz3SR1GDvfeGOz2s8pL7r+rBPc9Rc3MB3IT9luItKHBhRa5e+uiy6X5pJeYYL9vFANrs+PSl2Xjm3g== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b341fb73-13ae-418f-6517-08d7b8c68e0d X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Feb 2020 01:12:02.1582 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zmOfX86CmKYkH4oKK+kl3eOdH3wOCYFAi91dZRmM/XBpZi/WW52qZnAjqIXJv2GYr5mJGuURGeMGf6m4VaunCw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5219 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Subject: Re: [PATCH 1/7] Revert "tty: serial: fsl_lpuart: drop > EARLYCON_DECLARE" >=20 > Hi, >=20 > Am 2020-02-21 02:30, schrieb Peng Fan: > >> Subject: [PATCH 1/7] Revert "tty: serial: fsl_lpuart: drop > >> EARLYCON_DECLARE" > >> > >> This reverts commit a659652f6169240a5818cb244b280c5a362ef5a4. > >> > >> This broke the earlycon on LS1021A processors because the order of > >> the > >> earlycon_setup() functions were changed. Before the commit the normal > >> lpuart32_early_console_setup() was called. After the commit the > >> lpuart32_imx_early_console_setup() is called instead. > > > > How do you pass earlycon args to kernel? >=20 > earlycon=3Dlpuart32,mmio32be,0x2950000,115200 >=20 > please note that there are two possible declarations: (1) an OF/ACPI base= d > earlycon, eg just "earlycon" on the bootargs and (2) an elaborate one whe= re > you can give the offset and access method yourself, eg. the one from abov= e. >=20 > (1) will still work even with the EARLYCON_DECLARE() removed. But (2) wil= l > search through all possible > OF_DELARE_EARLYCON(lpuart32,..) > EARLYCON_DECLARE(lpuart32,..) >=20 > and doesn't take the compatible into account. So which setup function is > actually called depends on (a) the order of the OF_DECLARE_EARLYCON() and > EARLYCON_DECLARE() statements and (b) on the compiler (thats just a guess= !). > For me, the order in which it will actually end up in the __earlycon_tabl= e is > reversed, eg. the last one is called. So now that you've removed the > EARLYCON_DECLARE() the last one is the imx setup function which will add > the reg offset and doesn't work on LS1021A. You mean the OF_DECLARD_EARLYCON for i.MX7ULP will be put before LS1021A in Image? I am not sure about this. If this is true, you could try below di= ff, to see whether it works. i.MX always use little endian. diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuar= t.c index 91e2805e6441..1b0aa3b836c5 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -2381,8 +2381,10 @@ static int __init lpuart32_imx_early_console_setup(s= truct earlycon_device *devic if (!device->port.membase) return -ENODEV; - device->port.iotype =3D UPIO_MEM32; - device->port.membase +=3D IMX_REG_OFF; + if (device->port.iotype !=3D UPIO_MEM32BE) { + device->port.iotype =3D UPIO_MEM32; + device->port.membase +=3D IMX_REG_OFF; + } device->con->write =3D lpuart32_early_write; return 0; Thanks, Peng. >=20 > I've proposed a fix of the underlying problem [1]. But that fix also requ= ires the > EARLYCON_DECLARE() in this driver. >=20 >=20 > -michael >=20 > [1] > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flore.= ke > rnel.org%2Flinux-serial%2F20200220174607.24285-1-michael%40walle.cc% > 2F&data=3D02%7C01%7Cpeng.fan%40nxp.com%7Cc411bf1d5d45435be2a > 308d7b6b14a2c%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63 > 7178744883261681&sdata=3Dgjl8rie%2FXhUQ0pxcAbbDI4NGqGDYj1jpqfR > mRi%2FAgFk%3D&reserved=3D0