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Mon, 24 Feb 2020 12:20:54 +0000 From: peng.fan@nxp.com To: shawnguo@kernel.org, s.hauer@pengutronix.de, jassisinghbrar@gmail.com, leonard.crestez@nxp.com, o.rempel@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, m.felsch@pengutronix.de, hongxing.zhu@nxp.com, aisheng.dong@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Peng Fan Subject: [PATCH 0/3] mailbox/firmware: imx: support SCU channel type Date: Mon, 24 Feb 2020 20:14:31 +0800 Message-Id: <1582546474-21721-1-git-send-email-peng.fan@nxp.com> X-Mailer: git-send-email 2.7.4 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: HK2PR04CA0077.apcprd04.prod.outlook.com (2603:1096:202:15::21) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by HK2PR04CA0077.apcprd04.prod.outlook.com (2603:1096:202:15::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.2750.18 via Frontend Transport; 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This is make it to understand what changed to support using 1 TX and 1 RX channel for SCFW message. Per i.MX8QXP Reference mannual, there are several message using examples. One of them is: Passing short messages: Transmit register(s) can be used to pass short messages from one to four words in length. For example, when a four-word message is desired, only one of the registers needs to have its corresponding interrupt enable bit set at the receiver side. This patchset is to using this for SCFW message to replace four TX and four RX method. Pachset based on i.MX Shawn's for-next branch, commit fd7eba9fa1f534b710. To test this patchset, I applied the below diff: diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index fb5f752b15fe..c5636624726e 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -140,17 +140,11 @@ scu { compatible = "fsl,imx-scu"; - mbox-names = "tx0", "tx1", "tx2", "tx3", - "rx0", "rx1", "rx2", "rx3", + mbox-names = "tx0", + "rx0", "gip3"; mboxes = <&lsio_mu1 0 0 - &lsio_mu1 0 1 - &lsio_mu1 0 2 - &lsio_mu1 0 3 &lsio_mu1 1 0 - &lsio_mu1 1 1 - &lsio_mu1 1 2 - &lsio_mu1 1 3 &lsio_mu1 3 3>; clk: clock-controller { @@ -546,6 +540,7 @@ reg = <0x5d1c0000 0x10000>; interrupts = ; #mbox-cells = <2>; + fsl,scu; }; lsio_mu2: mailbox@5d1d0000 { Peng Fan (3): dt-bindings: mailbox: imx-mu: add fsl,scu property mailbox: imx: support SCU channel type firmware: imx-scu: Support one TX and one RX .../devicetree/bindings/mailbox/fsl,mu.txt | 1 + drivers/firmware/imx/imx-scu.c | 54 +++++++++++++++++----- drivers/mailbox/imx-mailbox.c | 42 +++++++++++++++-- 3 files changed, 82 insertions(+), 15 deletions(-) base-commit: fd7eba9fa1f534b7102f4762e25c991f78ec283d -- 2.16.4