Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp2973294ybv; Mon, 24 Feb 2020 15:35:07 -0800 (PST) X-Google-Smtp-Source: APXvYqxAYSnRN+dnPX8kjLiSb0oAi1Aaavv/vSCq4mEbSPxg5JmO1BNO/2CIPkall9HyVGp5925N X-Received: by 2002:aca:fcd4:: with SMTP id a203mr1141272oii.167.1582587307068; Mon, 24 Feb 2020 15:35:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1582587307; cv=none; d=google.com; s=arc-20160816; b=0VELyNB2cdI698t0t0xlwgZwa95eBaqMBjU2M6vpGlPQNrSCcLwPyVZpK21tdpBZak LNarKXPbgsab4YUGNPGisc+CdxnPcmraz7tBpYtAaW3B1w0CD0UKGRW9e9BGbcx19tuH RMer/GCvCr3afdwqtOfaTAkGX3zMiscQX+GAUmsRdxDok4s4rFgZ1ctbL30TmRkZqNyB 2zrzHT8/rO9xk0vqujv8F64bRAfpvD78qdgF/ag18S0caeOi416DBbNg1X3UR3JdRrQe fuWer+lkI2UnVC6UbkS5WVP/wY4yRCDk2uhwo1bhB5X+66IYhWVQUJr8ZJIDYnQKp0Uu 2lmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:from:subject:cc:to:message-id:date; bh=RflLy4vv3vuUHivDMbTkiR7i2OZNvtPw+tq/9cavHJs=; b=wI7ZHutCJCoXgxyxfKHEH9kn8IqwKlXCSONdwyMqBn0ToTE4krf6T/hsBEnjpvDDzo tHadQ8A0tt4D3pBtH7xx+n6JF6tg9lBqk7X/+Q6o4xQzFSBBehQcPF35p9M9osF2l3ro V5ap9vkCBaBAgIaYrVWNEaUR3vkeqcgGzyz/sSCuHauPOgsdQKZuyx8VkLP/pWLEV6AV LgjYAnSI+rxpUacK+pNIT87BLA7YpRmqMQSDxg90xp/Mrmj2AQ0sz7zxKH/lc4bY+cQV YbjGpK6aoO9OhgRnUFv1uVQNNjxtXSepxiyqHOA0sxCf9Lnbqf0e3LZOx/N9CixrJJne 0Ynw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e19si7295030otl.145.2020.02.24.15.34.54; Mon, 24 Feb 2020 15:35:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728475AbgBXXdy (ORCPT + 99 others); Mon, 24 Feb 2020 18:33:54 -0500 Received: from shards.monkeyblade.net ([23.128.96.9]:40140 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726651AbgBXXdy (ORCPT ); Mon, 24 Feb 2020 18:33:54 -0500 Received: from localhost (unknown [50.226.181.18]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id 50CCD124CE3F3; Mon, 24 Feb 2020 15:33:53 -0800 (PST) Date: Mon, 24 Feb 2020 15:33:52 -0800 (PST) Message-Id: <20200224.153352.364779446032996784.davem@davemloft.net> To: hkallweit1@gmail.com Cc: bhelgaas@google.com, nic_swsd@realtek.com, mlindner@marvell.com, stephen@networkplumber.org, clemens@ladisch.de, perex@perex.cz, tiwai@suse.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, alsa-devel@alsa-project.org Subject: Re: [PATCH 0/9] PCI: add and use constant PCI_STATUS_ERROR_BITS and helper pci_status_get_and_clear_errors From: David Miller In-Reply-To: <5939f711-92aa-e7ed-2a26-4f1e4169f786@gmail.com> References: <5939f711-92aa-e7ed-2a26-4f1e4169f786@gmail.com> X-Mailer: Mew version 6.8 on Emacs 26.3 Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [149.20.54.216]); Mon, 24 Feb 2020 15:33:53 -0800 (PST) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Heiner Kallweit Date: Mon, 24 Feb 2020 22:20:08 +0100 > Few drivers have own definitions for this constant, so move it to the > PCI core. In addition there are several places where the following > code sequence is used: > 1. Read PCI_STATUS > 2. Mask out non-error bits > 3. Action based on set error bits > 4. Write back set error bits to clear them > > As this is a repeated pattern, add a helper to the PCI core. > > Most affected drivers are network drivers. But as it's about core > PCI functionality, I suppose the series should go through the PCI > tree. Heiner, something is up with this submission. The subject line here says 0/9, but the patches say N/8 and patch #8 never showed up on the list. Sort out what this should be and resubmit, thank you.