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[209.85.208.177]) by smtp.gmail.com with ESMTPSA id n132sm1903733lfd.81.2020.02.24.19.15.31 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Feb 2020 19:15:32 -0800 (PST) Received: by mail-lj1-f177.google.com with SMTP id w1so12383268ljh.5 for ; Mon, 24 Feb 2020 19:15:31 -0800 (PST) X-Received: by 2002:a2e:909a:: with SMTP id l26mr30710614ljg.209.1582600531273; Mon, 24 Feb 2020 19:15:31 -0800 (PST) MIME-Version: 1.0 References: <20200221080325.GA67807@shbuild999.sh.intel.com> <20200221132048.GE652992@krava> <20200223141147.GA53531@shbuild999.sh.intel.com> <20200224003301.GA5061@shbuild999.sh.intel.com> <20200224021915.GC5061@shbuild999.sh.intel.com> <20200225025748.GB63065@shbuild999.sh.intel.com> In-Reply-To: <20200225025748.GB63065@shbuild999.sh.intel.com> From: Linus Torvalds Date: Mon, 24 Feb 2020 19:15:15 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [LKP] Re: [perf/x86] 81ec3f3c4c: will-it-scale.per_process_ops -5.5% regression To: Feng Tang Cc: Oleg Nesterov , "Eric W. Biederman" , Jiri Olsa , Peter Zijlstra , kernel test robot , Ingo Molnar , Vince Weaver , Jiri Olsa , Alexander Shishkin , Arnaldo Carvalho de Melo , Arnaldo Carvalho de Melo , "Naveen N. Rao" , Ravi Bangoria , Stephane Eranian , Thomas Gleixner , LKML , lkp@lists.01.org, andi.kleen@intel.com, "Huang, Ying" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 24, 2020 at 6:57 PM Feng Tang wrote: > > Thanks for the optimization patch for signal! > > It makes a big difference, that the performance score is tripled! > bump from original 17000 to 54000. Also the gap between 5.0-rc6 and > 5.0-rc6+Jiri's patch is reduced to around 2%. Ok, so what I think is happening is that the exact same issue still exists, but now with less contention it's not quite as noticeable. Can you find some Intel CPU hardware person who could spend a moment on that odd 32-byte sub-block issue? Considering that this effect apparently doesn't happen on any other platform you've tested, and this Cascade Lake platform is the newly released current Intel server platform, I think it's worth looking at. That microbenchmark is not important on its own, but the odd timing behaviour it has would be good to have explained. And while the signal sending microbenchmark is not likely to be very relevant to much anything else, I guess I'll apply the patch. Even if it's just a microbenchmark, it's not like we haven't used those before to pinpoint some very specific behavior. We used lmbench (and whatever that odd page cache benchmark was) to do some fairly fundamental optimizations back in the days. If you fix the details on all the microbenchmarks you find, eventually you probably do well on real loads too.. Linus