Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
In-Reply-To: <4c80783d-8ad0-9bd8-c42e-01659fa81afe@codeaurora.org>
References: <1581944408-7656-1-git-send-email-mkshah@codeaurora.org> <1581944408-7656-2-git-send-email-mkshah@codeaurora.org> <158216527227.184098.17500969657143611632@swboyd.mtv.corp.google.com> <4c80783d-8ad0-9bd8-c42e-01659fa81afe@codeaurora.org>
Subject: Re: [RFC 1/2] irqchip: qcom: pdc: Introduce irq_set_wake call
From:   Stephen Boyd <swboyd@chromium.org>
Cc:     linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
        agross@kernel.org, linus.walleij@linaro.org, tglx@linutronix.de,
        dianders@chromium.org, rnayak@codeaurora.org, ilina@codeaurora.org,
        lsrao@codeaurora.org
To:     Maulik Shah <mkshah@codeaurora.org>, bjorn.andersson@linaro.org,
        evgreen@chromium.org, mka@chromium.org
Date:   Tue, 25 Feb 2020 09:16:00 -0800
Message-ID: <158265096050.177367.409185999509868538@swboyd.mtv.corp.google.com>
User-Agent: alot/0.9
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Quoting Maulik Shah (2020-02-21 03:20:59)
>=20
> On 2/20/2020 7:51 AM, Stephen Boyd wrote:
>=20
>     How are wakeups supposed to work when the CPU cluster power is disabl=
ed
>     in low power CPU idle modes? Presumably the parent irq controller is
>     powered off (in this case it's an ARM GIC) and we would need to have =
the
>     interrupt be "enabled" or "unmasked" at the PDC for the irq to wakeup
>     the cluster.
>=20
> Correct. Interrupt needs to be "enabled" or "unmasked" at wakeup capable =
PDC
> for irqchip to wakeup from "deep" low power modes where parent GIC may no=
t be
> monitoring interrupt and only PDC is monitoring.
> these "deep" low power modes can either be triggered by kernel "suspend" =
or
> "cpuidle" path for which drivers may or may not have registered for suspe=
nd or
> cpu/cluster pm notifications to make a decision of enabling wakeup capabi=
lity.
>=20
>=20
>     We shouldn't need to enable irq wake on any irq for the CPU
>     to get that interrupt in deep CPU idle states.
>=20
> + *
> + *     Note: irq enable/disable state is completely orthogonal
> + *     to the enable/disable state of irq wake.
>=20
> i think that's what above documentation said to have wakeup capability is
> orthogonal to enable/disable state of irq, no?
>=20
> A deep cpuidle entry is also orthogonal to drivers unless they register f=
or cpu
> pm notifications.
>=20
> so with this change,
> if the drivers want their interrupt to be wakeup capable during both "sus=
pend"
> and "cpuidle" they can call "enable_irq_wake" and leave it there to be wa=
ke up
> capable.

Where is there a mention about drivers registering for cpu PM
notifications? I'm not aware of this being mentioned as a requirement.
Instead, my understanding is that deep idle states shouldn't affect irqs
from being raised to the CPU. If such an irq is enabled and can't wake
the system from deep idle and it's expected to interrupt during this
idle time then perhaps the PDC driver needs to block deep idle states
until that irq is disabled.

Does this scenario exist? It sounds like broken system design to have an
irq that can't wake from deep idle, but I see that PDC has a selective
set of pins so maybe some irqs just aren't expected to wake the system
up during idle.

>=20
> This way they don't need to worry about cpu entering to deep low power mo=
de and
> enabling wakeup capability "only when" deep low power mode get triggered.
>