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From:   Nick Desaulniers <ndesaulniers@google.com>
Date:   Tue, 25 Feb 2020 14:46:22 -0800
Message-ID: <CAKwvOdk-R7gYXr6PScgZcvHbCBF3TX+utMix44kZCo=qe1vZ2Q@mail.gmail.com>
Subject: Re: [PATCH] ARM: use assembly mnemonics for VFP register access
To:     Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc:     Stefan Agner <stefan@agner.ch>, Arnd Bergmann <arnd@arndb.de>,
        LKML <linux-kernel@vger.kernel.org>,
        Jian Cai <jiancai@google.com>,
        clang-built-linux <clang-built-linux@googlegroups.com>,
        Manoj Gupta <manojgupta@google.com>,
        Russell King <linux@armlinux.org.uk>,
        Linux ARM <linux-arm-kernel@lists.infradead.org>,
        Peter Smith <Peter.Smith@arm.com>
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On Tue, Feb 25, 2020 at 12:27 PM Nick Desaulniers
<ndesaulniers@google.com> wrote:
>
> On Tue, Feb 25, 2020 at 11:33 AM Ard Biesheuvel
> <ard.biesheuvel@linaro.org> wrote:
> >
> > On Tue, 25 Feb 2020 at 20:10, Nick Desaulniers <ndesaulniers@google.com=
> wrote:
> > > Ah, this is only when streaming to assembly. Looks like they have the
> > > same encoding, and produce the same disassembly. (Godbolt emits
> > > assembly by default, and has the option to compile, then disassemble)=
.
> > > If I take my case from godbolt above:
> > >
> > > =E2=9E=9C  /tmp arm-linux-gnueabihf-gcc -O2 -c x.c
> > > =E2=9E=9C  /tmp llvm-objdump -dr x.o
> > >
> > > x.o: file format elf32-arm-little
> > >
> > >
> > > Disassembly of section .text:
> > >
> > > 00000000 bar:
> > >        0: f1 ee 10 0a                  vmrs r0, fpscr
> > >        4: 70 47                        bx lr
> > >        6: 00 bf                        nop
> > >
> > > 00000008 baz:
> > >        8: f1 ee 10 0a                  vmrs r0, fpscr
> > >        c: 70 47                        bx lr
> > >        e: 00 bf                        nop
> > >
> > > So indeed a similar encoding exists for the two different assembler
> > > instructions.
> >
> > Does that hold for ARM (A32) instructions as well?
>
> TIL -mthumb is the default for arm-linux-gnueabihf-gcc -O2.
>
> =E2=9E=9C  /tmp arm-linux-gnueabihf-gcc -O2 -c x.c -marm
> =E2=9E=9C  /tmp llvm-objdump -dr x.o
>
> x.o: file format elf32-arm-little
>
>
> Disassembly of section .text:
>
> 00000000 bar:
>        0: 10 0a f1 ee                  vmrs r0, fpscr
>        4: 1e ff 2f e1                  bx lr
>
> 00000008 baz:
>        8: 10 0a f1 ee                  vmrs r0, fpscr
>        c: 1e ff 2f e1                  bx lr
>
> ^ Just to show the matching encoding.

Further, Peter just sent me this response off thread, which I thought
I'd share. Thanks Peter.  Bookmarked.
```
FWIW the Arm ARM reference manual
https://static.docs.arm.com/ddi0487/ea/DDI0487E_a_armv8_arm.pdf has a
table that maps the pre-UAL syntax to the UAL syntax.

K6.1.2 Pre-UAL instruction syntax for the A32 floating-point instructions
This has an entry mapping pre-UAL (FMRX) to UAL (VMSR)

So they are the same instruction with the modern name being VMSR. If
it is possible to use the new name it will probably confuse fewer
people, but other than that it won't do any harm.
```
--=20
Thanks,
~Nick Desaulniers