Received: by 2002:a25:1506:0:0:0:0:0 with SMTP id 6csp4703167ybv; Wed, 26 Feb 2020 01:38:29 -0800 (PST) X-Google-Smtp-Source: APXvYqyDu0jVREve/uw6FuktK6ZT4BKw01J60aiCE0Pf6Q8ZzpUhbLj7U2JTcAChJHIayqMB1bUW X-Received: by 2002:aca:5fc6:: with SMTP id t189mr2541183oib.166.1582709909042; Wed, 26 Feb 2020 01:38:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1582709909; cv=none; d=google.com; s=arc-20160816; b=CAgZuGWypI21wQ2Ua5inQ0aOM+u7I4kLa/GDCAWPFynWLuYr9txHeZq5mpnnf9OqZJ 71ktSU+7u7vY9RjWSy28qCk8TY/V/alykVUks+5k/dSmrQezvFD2XJqZh+yFF6qGPpK9 gOJDK6aMfUeeM8HDbQzVwJlWzilm6HQUAAv3NzTjeXHucPK7swreodF+V+83oRvnhsqQ guAFw/iQafsHcf05rgDy9rHO8qticEoPj3eoz+3JsuEIlBX5RdNWzrrqL1S2TRG9+izw orzPxNYZXjdql1VXjEhOZTwtslgO1M+YRTFxUO3p8LTiaMLXPNRJIRaWl9FeIb4RK4Ov 3uxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Jpouza164p3Am9bMPwtHIxkxR6RRsJkgHYuwQqRiHbE=; b=R+99nz46/nakLAblS2PKQmYZ63EArvP0S5rEXJWUIT+QTclx3uZ8nphVzJ1wE//a/e cysVhRtXYFKdXbNpikJT01TDuUWq9eDMZNmB1ZGs23V+KUbvsjnLJbP2k+VB78U8QC98 NSpdIhRPyuantngzkG4Ip6uBy/15wrKM+ILWgbUuhPqfD++FtzrhwZBG86cvxoPZaSz9 //+8tFAmcZgDKD46kD/+V9cwymvGADZ1sebWPnCYUhQkaK2rcQS5UyGLvA8oPsAmnR4n zlKwDlrKE8ZfjUxf3yx17qnMsQVMYefoaPpz5QlIk8OToZVp/Z0NWiHtCrAsav/79YUL v8hw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VZaqSjF7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f4si970616oto.169.2020.02.26.01.38.17; Wed, 26 Feb 2020 01:38:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VZaqSjF7; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728049AbgBZJh5 (ORCPT + 99 others); Wed, 26 Feb 2020 04:37:57 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:37312 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727457AbgBZJh4 (ORCPT ); Wed, 26 Feb 2020 04:37:56 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01Q9bhV4108078; Wed, 26 Feb 2020 03:37:43 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1582709863; bh=Jpouza164p3Am9bMPwtHIxkxR6RRsJkgHYuwQqRiHbE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VZaqSjF7LW5P3BRIgUjtyY/DUT4wgZ0+QQrgF7rWWLUEwvYsJ09dqPCYqVn1YiR+O 1nF1BORlEpW3gG44QM0odMDWUkPyVxWKxNVqIjkjp9kPugqCMi4Lm13Eiea/8MJ5r5 pmiXE6wc5ygPw0W+zgvH3ixmUNnnRvmjjO3t8B0Q= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01Q9bhMU119099 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 26 Feb 2020 03:37:43 -0600 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Wed, 26 Feb 2020 03:37:43 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Wed, 26 Feb 2020 03:37:42 -0600 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01Q9b4AD110613; Wed, 26 Feb 2020 03:37:39 -0600 From: Pratyush Yadav To: Tudor Ambarus , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Mark Brown , Rob Herring , Mark Rutland CC: Pratyush Yadav , , , , , Sekhar Nori Subject: [PATCH v2 08/11] mtd: spi-nor: parse xSPI Profile 1.0 table Date: Wed, 26 Feb 2020 15:07:00 +0530 Message-ID: <20200226093703.19765-9-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200226093703.19765-1-p.yadav@ti.com> References: <20200226093703.19765-1-p.yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This table is indication that the flash is xSPI compliant and hence supports octal DTR mode. Extract information like the fast read opcode, the number of dummy cycles needed for a Read Status Register command, and the number of address bytes needed for a Read Status Register command. The default dummy cycles for a fast octal DTR read are set to 20. Since there is no simple way of determining the dummy cycles needed for the fast read command, flashes that use a different value should update it in their flash-specific hooks. Signed-off-by: Pratyush Yadav --- drivers/mtd/spi-nor/spi-nor.c | 80 +++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 5 +++ 2 files changed, 85 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index c86c1537f76e..22784c403d77 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -58,12 +59,14 @@ struct sfdp_parameter_header { #define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */ #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */ #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */ +#define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 table. */ #define SFDP_SIGNATURE 0x50444653U #define SFDP_JESD216_MAJOR 1 #define SFDP_JESD216_MINOR 0 #define SFDP_JESD216A_MINOR 5 #define SFDP_JESD216B_MINOR 6 +#define SFDP_JESD216D_MINOR 8 struct sfdp_header { u32 signature; /* Ox50444653U <=> "SFDP" */ @@ -158,6 +161,11 @@ struct sfdp_bfpt { u32 dwords[BFPT_DWORD_MAX]; }; +/* xSPI Profile 1.0 table (from JESD216D.01). */ +#define PROFILE1_DWORD1_RD_FAST_CMD GENMASK(15, 8) +#define PROFILE1_DWORD1_RDSR_DUMMY BIT(28) +#define PROFILE1_DWORD1_RDSR_ADDR_BYTES BIT(29) + /** * struct spi_nor_fixups - SPI NOR fixup hooks * @default_init: called after default flash parameters init. Used to tweak @@ -4426,6 +4434,74 @@ static int spi_nor_parse_4bait(struct spi_nor *nor, return ret; } +/** + * spi_nor_parse_profile1() - parse the xSPI Profile 1.0 table + * @nor: pointer to a 'struct spi_nor' + * @param_header: pointer to the 'struct sfdp_parameter_header' describing + * the 4-Byte Address Instruction Table length and version. + * @params: pointer to the 'struct spi_nor_flash_parameter' to be. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_parse_profile1(struct spi_nor *nor, + const struct sfdp_parameter_header *profile1_header, + struct spi_nor_flash_parameter *params) +{ + u32 *table, opcode, addr; + size_t len; + int ret, i; + + len = profile1_header->length * sizeof(*table); + table = kmalloc(len, GFP_KERNEL); + if (!table) + return -ENOMEM; + + addr = SFDP_PARAM_HEADER_PTP(profile1_header); + ret = spi_nor_read_sfdp(nor, addr, len, table); + if (ret) + goto out; + + /* Fix endianness of the table DWORDs. */ + for (i = 0; i < profile1_header->length; i++) + table[i] = le32_to_cpu(table[i]); + + /* Get 8D-8D-8D fast read opcode and dummy cycles. */ + opcode = FIELD_GET(PROFILE1_DWORD1_RD_FAST_CMD, table[0]); + + /* + * Update the fast read settings. We set the default dummy cycles to 20 + * here. Flashes can change this value if they need to when enabling + * octal mode. + */ + params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR], + 0, 20, opcode, + SNOR_PROTO_8_8_8_DTR); + + /* + * Since the flash supports xSPI DTR reads, it should also support DTR + * Page Program opcodes. + */ + params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR; + + /* + * Set the Read Status Register dummy cycles and dummy address bytes. + */ + if (table[0] & PROFILE1_DWORD1_RDSR_DUMMY) + params->rdsr_dummy = 8; + else + params->rdsr_dummy = 4; + + if (table[0] & PROFILE1_DWORD1_RDSR_ADDR_BYTES) + params->rdsr_addr_nbytes = 4; + else + params->rdsr_addr_nbytes = 0; + +out: + kfree(table); + return ret; +} + /** * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters. * @nor: pointer to a 'struct spi_nor' @@ -4527,6 +4603,10 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, err = spi_nor_parse_4bait(nor, param_header, params); break; + case SFDP_PROFILE1_ID: + err = spi_nor_parse_profile1(nor, param_header, params); + break; + default: break; } diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 364f37276d78..f54dbd0f86ab 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -515,6 +515,9 @@ struct spi_nor_locking_ops { * * @size: the flash memory density in bytes. * @page_size: the page size of the SPI NOR flash memory. + * @rdsr_dummy: dummy cycles needed for Read Status Register command. + * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register + * command. * @hwcaps: describes the read and page program hardware * capabilities. * @reads: read capabilities ordered by priority: the higher index @@ -537,6 +540,8 @@ struct spi_nor_locking_ops { struct spi_nor_flash_parameter { u64 size; u32 page_size; + u8 rdsr_dummy; + u8 rdsr_addr_nbytes; struct spi_nor_hwcaps hwcaps; struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; -- 2.25.0